upd72872 Renesas Electronics Corporation., upd72872 Datasheet - Page 29

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upd72872

Manufacturer Part Number
upd72872
Description
Ieee1394 1-chip Ohci Host Controller
Manufacturer
Renesas Electronics Corporation.
Datasheet

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3.2.2 Offset_28
3.2.3 Offset_80
0
1
2
3
4
14-5
15
31-16
0
1
2
3
4
14-5
15
31-16
31-0
(3) Function Reset Status Register (FRSR) ( Base Address 1 ( 2 )+ 8H )
(4) Function Force Event Register (FFER) ( Base Address 1 ( 2 )+ CH )
This register specifies start memory address of the Cardbus CIS Area.
The µ PD72872 supports external Serial ROM (AT24C02 compatible) interface.
CIS Area Register can be loaded from external Serial ROM in the CIS area when CARD_ON is 1.
Bits
Bits
Bits
Cardbus CIS Pointer
CIS Area
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
-
Write Protect (No Use).
Read only as ‘0’
Ready Status (No Use).
Read only as ‘0’
Battery Voltage Detect 2 (No Use).
Read only as ‘0’
Battery Voltage Detect 1 (No Use).
Read only as ‘0’
General Wakeup Mask
Reserved. Read only as ‘0’
Interrupt
Reserved. Read only as ‘0’
Write Protect (No Use).
Read only as ‘0’
Ready Status (No Use).
Read only as ‘0’
Battery Voltage Detect 2 (No Use).
Read only as ‘0’
Battery Voltage Detect 1 (No Use).
Read only as ‘0’
General Wakeup Mask
No Use
Interrupt
Reserved. Read only as ‘0’
Starting Pointer of CIS Area.
Constant value of 00000080H.
Data Sheet S14793EJ1V0DS
Description
Description
Description
29

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