upd72872 Renesas Electronics Corporation., upd72872 Datasheet - Page 24

• Manufacturer Part Number: upd72872
• Description: Ieee1394 1-chip Ohci Host Controller
• Manufacturer: Renesas Electronics Corporation.

3.1.16 Offset_3C
the 1394 OpenHCI specification.
3.1.17 Offset_3D
the 1394 OpenHCI specification.
3.1.18 Offset_3E
Resolution is in units of ¼ µ s. The value should be loaded into the register from the external serial EEPROM upon
power-up reset, and access to this register through PCI-bus is prohibited.
3.1.19 Offset_3F
MHz. Resolution is in units of ¼ µ s. The value should be loaded into the register from the external serial EEPROM
after hardware reset, and access to this register through PCI-bus is prohibited.
3.1.20 Offset_40
register. It is reserved for OpenHCI use only.
24
7-0
7-0
7-0
7-0
0
31-1
This register provides the interrupt line routing information specific to the µ PD72872, the NEC’s implementation of
This register provides the interrupt line routing information specific to the µ PD72872, the NEC’s implementation of
This register specifies how long of a burst period the µ PD72872 needs, assuming a clock rate of 33 MHz.
This register specifies how often the µ PD72872 needs to gain access to the PCI-bus, assuming a clock rate of 33
This register specifies the control bits that are IEEE1394 OpenHCI specific. Vendor options are not allowed in this
Bits
Bits
Bits
Bits
Bits
PCI_OHCI_Control Register
Max_Lat Register
Interrupt Line Register
Interrupt Pin Register
Min_Gnt Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
Default value of 00H. It specifies which input of the host system interrupt controller the
interrupt pin of the µ PD72872 is connected to.
Default value of 00H. Its value contributes to the desired setting for Latency Timer value.
Default value of 00H. Its value contributes to the desired setting for Latency Timer value.
PCI global SWAP Default value of 0. When this bit is 1, all quadrates read from and written to
the PCI Interface are byte swapped, thus a “PCI Global Swap”. PCI addresses for expansion
ROM and PCI Configuration registers, are, however, unaffected by this bit. This bit is not
required for motherboard implementations.
Reserved Constant value of all 0.
Constant value of 01H. It specifies PCI INTA is used for interrupting the host system.
Data Sheet S14793EJ1V0DS
Description
Description
Description
Description
Description