upd78f0148m1gka1-9eu Renesas Electronics Corporation., upd78f0148m1gka1-9eu Datasheet - Page 375

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upd78f0148m1gka1-9eu

Manufacturer Part Number
upd78f0148m1gka1-9eu
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
Note The ERRE0 setting is valid even when BUSYE0 = 0.
Caution When TSF0 is 1, rewriting serial operation mode specification register 0 (CSIMA0), serial status
ERRE0
ERRF0
TSF0
0
1
0
1
0
1
register 0 (CSIS0), divisor selection register 0 (BRGCA0), automatic data transfer address point
specification register 0 (ADTP0), automatic data transfer interval specification register 0
(ADTI0), and serial I/O shift register 0 (SIOA0) are prohibited. However, these registers can be
read and re-written to the same value. In addition, the buffer RAM can be rewritten during
transfer.
Note
Error detection disabled
Error detection enabled
• Bit 7 (CSIAE0) of serial operation mode specification register 0 (CSIMA0) = 0
• At reset input
• When communication is started by setting bit 0 (ATSTA0) of serial trigger register 0 (CSIT0) to 1
Bit error detected (when ERRE0 = 1, the level specified by BUSYLV0 during the data bit transfer
period is detected via BUSY0 pin input).
• Bit 7 (CSIAE0) of serial operation mode specification register 0 (CSIMA0) = 0
• At reset input
• At the end of the specified transfer
• When transfer is stopped by setting bit 1 (ATSTP0) of serial trigger register 0 (CSIT0) to 1
From the transfer start to the end of the specified transfer
or writing to SIOA0.
Figure 17-4. Format of Serial Status Register 0 (CSIS0) (2/2)
CHAPTER 17 SERIAL INTERFACE CSIA0
User’s Manual U15947EJ3V1UD
Bit error detection enable/disable
Transfer status detection flag
Bit error detection flag
375

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