upd78f0148m1gka1-9eu Renesas Electronics Corporation., upd78f0148m1gka1-9eu Datasheet - Page 436

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upd78f0148m1gka1-9eu

Manufacturer Part Number
upd78f0148m1gka1-9eu
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
19.4.4 Interrupt request hold
executed, request acknowledgment is held pending until the end of execution of the next instruction.
instructions (interrupt request hold instructions) are listed below.
436
CPU processing
There are instructions where, even if an interrupt request is issued for them while another instruction is being
• MOV PSW, #byte
• MOV A, PSW
• MOV PSW, A
• MOV1 PSW.bit, CY
• MOV1 CY, PSW.bit
• AND1 CY, PSW.bit
• OR1 CY, PSW.bit
• XOR1 CY, PSW.bit
• SET1 PSW.bit
• CLR1 PSW.bit
• RETB
• RETI
• PUSH PSW
• POP PSW
• BT PSW.bit, $addr16
• BF PSW.bit, $addr16
• BTCLR PSW.bit, $addr16
• EI
• DI
• Manipulation instructions for the IF0L, IF0H, IF1L, IF1H, MK0L, MK0H, MK1L, MK1H, PR0L, PR0H, PR1L, and
Caution The BRK instruction is not one of the above-listed interrupt request hold instructions. However,
Figure 19-11 shows the timing at which interrupt requests are held pending.
Remarks 1. Instruction N: Interrupt request hold instruction
PR1H registers
××IF
the software interrupt activated by executing the BRK instruction causes the IE flag to be cleared
to 0. Therefore, even if a maskable interrupt request is generated during execution of the BRK
instruction, the interrupt request is not acknowledged.
2. Instruction M: Instruction other than interrupt request hold instruction
3. The ××PR (priority level) values do not affect the operation of ××IF (interrupt request).
Instruction N
Figure 19-11. Interrupt Request Hold
CHAPTER 19 INTERRUPT FUNCTIONS
User’s Manual U15947EJ3V1UD
Instruction M
PSW and PC saved, jump
to interrupt servicing
Interrupt servicing
program
These

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