upd78f0148m1gka1-9eu Renesas Electronics Corporation., upd78f0148m1gka1-9eu Datasheet - Page 382

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upd78f0148m1gka1-9eu

Manufacturer Part Number
upd78f0148m1gka1-9eu
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
17.4.2 3-wire serial I/O mode
specification register 0 (CSIMA0) is cleared to 0.
interface.
serial input (SIA0) lines.
382
The one-byte data transmission/reception is executed in the mode in which bit 6 (ATE0) of serial operation mode
The 3-wire serial I/O mode is useful for connecting peripheral ICs and display controllers with a clocked serial
In this mode, communication is executed by using three lines: serial clock (SCKA0), serial output (SOA0), and
(1) Registers used
• Serial operation mode specification register 0 (CSIMA0)
• Serial status register 0 (CSIS0)
• Divisor selection register 0 (BRGCA0)
• Port mode register 14 (PM14)
• Port register 14 (P14)
Notes 1. Bits 7, 6, and 4 to 1 (CSIAE0, ATE0, MASTER0, TXEA0, RXEA0, and DIR0) are used. Setting of
The basic procedure of setting an operation in the 3-wire serial I/O mode is as follows.
<1> Set the BRGCA0 register (see Figure 17-6)
<2> Set bits 4 to 1 (MASTER0, TXEA0, RXEA0, and DIR0) of the CSIMA0 register (see Figure 17-3).
<3> Set bit 7 (CSIAE0) of the CSIMA0 register to 1 and clear bit 6 (ATE0) to 0.
<4> Write data to serial I/O shift register 0 (SIOA0). → Data transmission/reception is started
Notes 1. This register does not have to be set when the slave mode is specified (MASTER0 = 0).
Caution Take relationship with the other party of communication when setting the port mode
2. Only bit 0 (TSF0) is used.
2. Write dummy data to SIOA0 only for reception.
bit 5 (ATM0) is invalid.
register and port register.
CHAPTER 17 SERIAL INTERFACE CSIA0
Note 2
User’s Manual U15947EJ3V1UD
Note 1
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Note 1
Note 2
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