z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 132

• Manufacturer Part Number: z16f2811
• Description: High Performance Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS022006-0207
Manual Off-state Control of PWM Output Channels
Deadband Insertion
Minimum PWM Pulse Width Filter
Each PWM output is controlled directly by the modulator logic or set to the off-state. To
manually set the PWM output to the off-state, set the OUTCTL bit and the associated
OUTx
individually by channel. For example, suppressing a single output of pair allows the
complementary channel to continue operating. Similarly, if the outputs are operating
independently disabling one output channel has no effect on the other PWM outputs.
When the PWM outputs are configured to operate as complementary pairs, an 8-bit deadband
value is defined in the
causes the modulator to separate the deassertion of one PWM signal from the assertion of its
complement. This is essential for many motor control applications to prevent simultaneous
turn-on of the high-side and low-side drive transistors. The deadband counter directly counts
system clock cycles and is unaffected by PWM prescaler settings. The width of this deadband
is the number of system clock cycles specified in the
The minimum deadband duration is zero system clocks and the maximum time is 255 system
clocks. Both PWM outputs of a complementary pair is deasserted during the deadband
period. Generation of deadband time does not alter the PWM period but the deadband time is
subtracted from the active time of the PWM outputs.
effect of deadband insertion on the PWM output.
The PWM modulator is capable of producing pulses as narrow as a single system clock
cycle in width. The response time of external drive circuit is slower than the period of a
system clock. Therefore, a filter is implemented to enforce a minimum width pulse on the
PWM output pins. All output pulses, either high or low, must be at least the minimum
number of PWM clock cycles (for more details, see
as specified in the
expected pulse width is less than the threshold, the associated PWM output does not
change state until the duty cycle value has changed sufficiently to allow pulse generation
of an acceptable width. The minimum pulse width filter also accounts for the duty cycle
variation caused by the deadband insertion. The PWM output pulse is filtered even if the
programmed duty cycle is greater than the threshold but the decrease in pulse width
because of deadband insertion causes the pulse to be too narrow. The pulse width filter
value is calculated as:
where
bits in the
T
roundup PWMMPF
minPulseOut
(
PWM Output Control Register
PWM Minimum Pulse Width Filter (PWMMPF)
is the shortest allowed pulse width on the PWM outputs (in seconds).
PWM Deadband Register
)
P R E L I M I N A R Y
=
T
minPulseOut
⁄
(
T
systemClock
(PWMOUT). Off-state control operates
(PWMDB). Inserting deadband time
PWM Deadband Register
Figure 21
PWM Prescaler
⋅
PWMprescaler
on page 116 illustrates the
Multi-Channel PWM Timer
Product Specification
ZNEO
on page 115) in width
register. If the
)
™
Z16F Series
(PWMDB).
118