z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 28

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z16f2811

Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet

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Table 2. Signal Descriptions (Continued)
PS022006-0207
Signal Mnemonic
MISO
UART Controllers
TXD0/TXD1
RXD0/RXD1
CTS0/CTS1
DE0/DE1
General-Purpose Timers
T0OUT/T0OUT
T1OUT/T1OUT
T2OUT/T2OUT
T0IN/T0IN1/T0IN2
/T1IN/T2IN
Pulse-Width Modulator for Motor Control
PWMH0/PWMH1/
PWMH2
PWML0/PWML1/
PWML2
FAULT0/FAULTY
Analog
ANA[11:0]
VREF
Caution:
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
Description
Master-In/Slave-Out: This pin is the data input to the SPI master
device and the data output from the SPI slave device.
Transmit data: These signals transmit outputs from the UARTs.
Receive data: These signals receives inputs for the UARTs and
IrDAs.
Clear to Send: These signals are control inputs for the UARTs.
Driver enable (DE): This signal allows automatic control of
external RS-485 drivers. This signal is approximately the inverse
of the Transmit Empty (TXE) bit in the UART Status 0 Register.
The DE signal is used to ensure an external RS-485 driver is
enabled when data is transmitted by the UART.
General-purpose timer outputs: These signals are output pins
from the timers.
General-purpose timer inputs: These signals are used as the
capture, gating, and counter inputs.
PWM High output.
PWM Low output.
PWM Fault condition input: FAULT0 and FAULTY are active
Low.
Analog input: These signals are inputs to the ADC.
ADC reference voltage input or internal reference output:
The VREF pin must be capacitively coupled to analog ground, if
the internal voltage reference is selected as the ADC reference
voltage. A 10 μF capacitor is recommended.
P R E L I M I N A R Y
Signal and Pin Descriptions
Product Specification
ZNEO
Z16F Series
14

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