z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 307

• Manufacturer Part Number: z16f2811
• Description: High Performance Microcontrollers
• Manufacturer: ZiLOG Semiconductor

Table 162. IPO Trim 1 (IPOTRIM1)
Table 163. IPO Trim 2 (IPOTRIM2)
PS022006-0207
BITS
FIELD
RESET
R/W
ADDR
Note: L = Loaded at Reset. R/W = Read/Write. This register is loaded from Information area on Reset.
BITS
FIELD
RESET
R/W
ADDR
Note: L = Loaded at Reset. R/W = Read/Write. This register is loaded from Information area on Reset.
Information Area
IPO Trim registers (Information Area Address 0021H and 0022H)
R/W
R/W
7
L
7
L
Reserved
These option bits are reserved for future use and must always be 1. This setting is the
default for unprogrammed (erased) Flash.
Data in the information area of memory cannot be altered directly. If you wish to alter the
factory settings, it must be done by writing to the Register Address identified. The part
defaults to the factory settings after reset and the registers must be re-written to have the
user settings in effect. Read the information area address to determine the factory
settings.
Table 162
accessing the IPOTRIM1 and IPOTRIM2 registers.
The IPO Trim table is TBD.
R/W
R/W
and
6
L
6
L
Table 163
IPO TEMP TRIM
R/W
R/W
5
5
L
L
define the IPO Trim settings. They are altered after reset by
P R E L I M I N A R Y
R/W
R/W
FFFF_FF25H
4
L
4
L
FFFF_FF26
IPO TRIM
R/W
R/W
3
3
L
L
R/W
R/W
2
L
2
L
Product Specification
ZNEO
R/W
R/W
1
1
L
L
™
IPO TRIM
Z16F Series
Option Bits
R/W
R/W
0
L
0
L
293