w83194br-372 Winbond Electronics Corp America, w83194br-372 Datasheet - Page 6

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w83194br-372

Manufacturer Part Number
w83194br-372
Description
Clock Generator For Sis 746/748 Chipsets
Manufacturer
Winbond Electronics Corp America
Datasheet
5. PIN DESCRIPTION
5.1 Crystal I/O
5.2 CPU, AGP, ZCLK and PCI, IOAPIC Clock Outputs
16, 17, 20,
21, 22, 23
47, 46
40,39
31,30
9,10
PIN
PIN
43
14
15
BUFFER TYPE SYMBOL
6
7
IN
IN
IOAPIC [0:1]
PIN NAME
OUT
PIN NAME
OD
AGP_0: 1
ZCLK0: 1
IN
tp120k
td120k
PCI [0:5]
&
#
*
XOUT
CPUC0
PCI_F0
PCI_F1
CPUT0
CPUT1
XIN
FS2
FS3*
&
TYPE
IN
IN
OUT
TYPE
OUT
OUT
OUT
OUT
OUT
OUT
IN
OD
OD
td120k
tp120k
Input
Latched input at power up, internal 120kΩ pull up.
Latched input at power up, internal 120kΩ pull down.
Output
Open Drain
Active Low
Internal 120kΩ pull-up
Internal 120 kΩ pull-down
Crystal input with internal loading capacitors (18pF) and
feedback resistors.
Crystal output at 14.318MHz nominally with internal loading
capacitors (18pF).
2.5V open drain differential clock outputs for AMD K7 CPU
2.5V open drain singled –ended synchronize with CPUT0, For
chipset host bus
3.3V AGP clock outputs.
3.3V ZCLK clock outputs, For MuTIOL bus.
3.3V PCI free running clock output.
Latched input for FS2 at initial power up for H/W selecting the
output frequency. This is internal 120K pull down.
3.3V PCI free running clock output.
Latched input for FS3 at initial power up for H/W selecting the
output frequency, This is internal 120K pull up.
Low skew (< 250ps) PCI clock outputs.
2.5V IOAPIC outputs.
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DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: April 13, 2005
W83194BR-372
Revision 1.1

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