w83194br-sd Winbond Electronics Corp America, w83194br-sd Datasheet - Page 14

no-image

w83194br-sd

Manufacturer Part Number
w83194br-sd
Description
Winbond Clock Generator For Intel P4 Springdale Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.7
7.8
7.9
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register 6: Watchdog Timer (Default =08H)
Register 7: Asynchronous Program (Default = 40H)
Register 8: M/N Program (Default = 8AH)
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
WD_TIME [7]
WD_TIME [6]
WD_TIME [5]
WD_TIME [4]
WD_TIME [3]
WD_TIME [2]
WD_TIME [1]
WD_TIME [0]
ASEL<1>
ASEL<0>
M_DIV [6]
M_DIV [5]
M_DIV [4]
M_DIV [3]
M_DIV [2]
M_DIV [1]
M_DIV [0]
N_DIV [8]
Tri-state
Reserve
Reserve
Reserve
Reserve
Reserve
NAME
NAME
NAME
PWD
PWD
PWD
0
1
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
Setting the down count depth. One bit resolution represents 250 mS.
Default time depth is 8*250 mS = 2.0 second. If the watchdog timer
is counting, this register will return present down count value.
Tri-state all output if set 1
Reserved
Reserved
Reserved
Reserved
Reserved
Asynchronous AGP/PCI frequency table selection
ASEL<1:0>
Programmable N divisor value. Bit 7 ~0 are defined in the Register 8.
Programmable M divisor value.
00: 66.6 MHz
10: 79.9 MHz
W83194BR-SD/W83194BG-SD
- 10 -
DESCRIPTION
DESCRIPTION
DESCRIPTION
01:72.1 MHz
11:68.7 MHz

Related parts for w83194br-sd