mk2069-04 Integrated Device Technology, mk2069-04 Datasheet - Page 5

• Manufacturer Part Number: mk2069-04
• Description: Vcxo-based Universal Clock Translator
• Manufacturer: Integrated Device Technology

IDT™ / ICS™ VCXO-BASED UNIVERSAL CLOCK TRANSLATOR
MK2069-04
VCXO-BASED UNIVERSAL CLOCK TRANSLATOR
5
Application Information
The MK2069-04 is a mixed analog / digital integrated circuit
that is sensitive to PCB (printed circuit board) layout and
external component selection. Used properly, the device will
provide the same high performance expected from a
canned VCXO-based hybrid timing device, but at a lower
cost. To help avoid unexpected problems, the guidance
provided in the sections below should be followed.
Setting VCLK Output Frequency
The frequency of the VCLK output is determined by the
following relationship:
Because the RPV divider inherently has a higher speed of
operation than the RV divider, the RPV divider should be set
to 8 when this factor is included in the RPV x RV divisor
combination.
VCLK output frequency range is set by the allowable
frequency range of the external VCXO crystal and by the
internal VCXO divider selections:
A higher crystal frequency will generally produce lower
phase noise and therefore is preferred. A crystal frequency
between 13.5 MHz and 27 MHz is recommended.
Because VCLK is generated by the external crystal, the
tracking range of VCLK in a given configuration is limited by
Where:
Where:
f(VCLK)
f(VCLK)
FV Divider = 1 to 4096
RPV Divider = 1 or 8
RV Divider = 2 to 4097
F(VCXO) = F(External Crystal) = 8 to 27 MHz
SV Divider = 1,2,4,6,8,10,12 or 16
=
=
------------------------------------------------------------------ -
RPV Divider RV Divider
---------------------- -
SV Divider
f VCXO
(
FV Divider
)
×
VCXO AND SYNTHESIZER
MK2069-04
×
f(ICLK)
REV G 090905