mc68hc912bc32 Freescale Semiconductor, Inc, mc68hc912bc32 Datasheet - Page 182

• Manufacturer Part Number: mc68hc912bc32
• Description: M68hc12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Enhanced Capture Timer (ECT) Module
13.4.18 Input Control Overwrite Register
Read: Anytime
Write: Anytime
An IC register is empty when it has been read or latched into the holding register. A holding register is
empty when it has been read.
NOVWx — No Input Capture Overwrite Bits
13.4.19 Input Control System Control Register
Read: Anytime
Write: May be written once (SMODN = 1). Writes are always permitted when
SHxy — Share Input Action of Input Capture Channels x and y Bits
TFMOD — Timer Flag-Setting Mode Bit
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Use of the TFMOD bit in the ICSYS register ($AB) in conjunction with the use of the ICOVW register
($AA) allows a timer interrupt to be generated after capturing two values in the capture and holding
registers instead of generating an interrupt for every capture.
0 = The contents of the related capture register or holding register can be overwritten when a new
1 = The related capture register or holding register cannot be written by an event unless they are
0 = Normal operation
1 = The channel input x causes the same action on the channel y. The port pin x and the
SMODN = 0.
input capture or latch occurs.
empty (see
is read or latched in the holding register.
corresponding edge detector is used to be active on the channel y.
Address: $00AA
Address: $00AB
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 13-40. Input Control System Control Register (ICSYS)
13.3.1 IC
Figure 13-39. Input Control Overwrite Register (ICOVW)
NOVW7
SH37
Bit 7
Bit 7
0
0
NOVW6
Channels). This will prevent the captured value to be overwritten until it
SH26
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
NOVW5
SH15
5
0
5
0
NOVW4
SH04
4
0
4
0
NOVW3
TFMOD
3
0
3
0
NOVW2
PACMX
2
0
2
0
NOVW1
BUFEN
1
0
1
0
Freescale Semiconductor
NOVW0
LATQ
Bit 0
Bit 0
0
0