mc68hc11c0 Freescale Semiconductor, Inc, mc68hc11c0 Datasheet - Page 45

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mc68hc11c0

Manufacturer Part Number
mc68hc11c0
Description
8-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
TCTL2 — Timer Control 2
TMSK1 — Timer Interrupt Mask 1
OC1I –OC4I — Output Compare x Interrupt Enable
I4/O5I — Input Capture 4 or Output Compare 5 Interrupt Enable
IC1I –IC3I — Input Capture x Interrupt Enable
TFLG1 — Timer Interrupt Flag 1
OC1F –OC4F — Output Compare x Flag
I4/O5F — Input Capture 4/Output Compare 5 Flag
IC1F –IC3F — Input Capture x Flag
45
MOTOROLA
RESET:
RESET:
RESET:
If the OCxF flag bit is set while the OCxI enable bit is set, a hardware interrupt sequence is requested.
When I4/O5 in PACTL is one, I4/O5I is the input capture 4 interrupt bit. When I4/O5 in PACTL is zero,
I4/O5I is the output compare 5 interrupt control bit.
If the ICxF flag bit is set while the ICxI enable bit is set, a hardware interrupt sequence is requested.
Clear flags by writing a one to the corresponding bit position(s).
Set each time the counter matches output compare x value
Set by IC4 or OC5, depending on which function was enabled by I4/O5 of PACTL
Set each time a selected active edge is detected on the ICx input line
EDG4B
OC1F
OC1I
Bit 7
Bit 7
Bit 7
0
0
0
Control bits in TMSK1 correspond bit for bit with flag bits in TFLG1. Ones in TMSK1
enable the corresponding interrupt sources.
EDGxB
EDG4A
OC2F
OC2I
0
0
1
1
6
0
6
0
6
0
Freescale Semiconductor, Inc.
EDG1B
For More Information On This Product,
OC3F
OC3I
5
0
5
0
5
0
EDGxA
Table 9 Timer Control Configuration
0
1
0
1
Go to: www.freescale.com
EDG1A
OC4F
OC4I
4
0
4
0
4
0
EDG2B
I4/O5F
NOTE
I4/O5I
3
0
3
0
3
0
Capture on falling edges only
Capture on rising edges only
Capture on any edge
Capture disabled
EDG2A
Configuration
IC1F
IC1I
2
0
2
0
2
0
EDG3B
IC2F
IC2I
1
0
1
0
1
0
EDG3A
IC3F
Bit 0
Bit 0
Bit 0
$0021
$0022
$0023
IC3I
0
0
0
MC68HC11C0TS/D
MC68HC11C0

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