mc68hc705j1avs Freescale Semiconductor, Inc, mc68hc705j1avs Datasheet - Page 73

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mc68hc705j1avs

Manufacturer Part Number
mc68hc705j1avs
Description
M68hc05 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.4 Interrupts
4.4.1 Software Interrupt
4.4.2 External Interrupt
MC68HC705J1A — Rev. 4.0
These sources can generate interrupts:
An interrupt temporarily stops the program sequence to process a
particular event. An interrupt does not stop the operation of the
instruction being executed, but takes effect when the current instruction
completes its execution. Interrupt processing automatically saves the
CPU registers on the stack and loads the program counter with a
user-defined interrupt vector address.
The software interrupt (SWI) instruction causes a non-maskable
interrupt.
An interrupt signal on the IRQ/V
request. When the CPU completes its current instruction, it tests the IRQ
latch. If the IRQ latch is set, the CPU then tests the I bit in the condition
code register. If the I bit is clear, the CPU then begins the interrupt
sequence.
Freescale Semiconductor, Inc.
For More Information On This Product,
Software interrupt (SWI) instruction
External interrupt pins:
– IRQ/V
– PA0–PA3
Timer:
– Real-time interrupt flag (RTIF)
– Timer overflow flag (TOF)
Go to: www.freescale.com
Resets and Interrupts
PP
PP
pin latches an external interrupt
Resets and Interrupts
Technical Data
Interrupts

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