adm6999ux Infineon Technologies Corporation, adm6999ux Datasheet - Page 36

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adm6999ux

Manufacturer Part Number
adm6999ux
Description
Adm6999u 9 Port 10/100 Mb/s Single Chip Ethernet Switch Controller
Manufacturer
Infineon Technologies Corporation
Datasheet

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Gigabit Port Configuration Register
GPCR
Gigabit Port Configuration Register
Field
CBTC
RP
GS
MII
Data Sheet
Bits
15:10
9
8
7:0
Type
rw
rw
rw
rw
Description
Cascade Buffer Threshold Control.
Casecade buffer threshold control. These bits function only when
ADM6999U/UX is configured to the EBUS mode and bit[15] in 27
configured to 1.
010110
Bit[13:10]:
The buffers allocated to each port in the casecade switch is equal to
Bit[13:10] * 4
Bit[15:14]:
The totally used buffers in the switch.
00
01
10
11
Replaced Packet VID 0, 1 by PVID
1/ADM6999U/UX will replace packet VID by PVID when coming packet's
VID=0 or1, 0/ADM6999U/UX will not replace packet's VID 0 & 1.
0
1
Giga Speed selection MSB
Gigabit Speed selection MSB bit of MII register 01
1
MII register 9 bit[15:8]
See MII register 09
20
B
B
B
B
B
B
B
H
, disable, default
, enable
, default
, default
B
, default
, 48, When the used buffer count reaches 48, the casecade
port starts to check the buffer count that has been used by the
port in the casecade switch
, 64, When the used buffer count reaches 64, the casecade
port starts to check the buffer count that has been used by the
port in the casecade switch.
, 80 When the used buffer count reaches 80, the casecade port
starts to check the buffer count that has been used by the port
in the casecade switch.
, 96 When the used buffer count reaches 96, the casecade port
starts to check the buffer count that has been used by the port
in the casecade switch.
Offset
0A
36
H
H
definition
H
Rev. 1.42, 2005-11-25
ADM6999U/UX
Data Sheet
Descriptions
Reset Value
H
5902
is
H

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