tda19978bhv NXP Semiconductors, tda19978bhv Datasheet - Page 12

• Manufacturer Part Number: tda19978bhv
• Description: Quad Hdmi 1.3a Receiver Interface With Equalizer Hdtv Up To 1080p, Up To Uxga For Pc Formats
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDA19978B_1
Product data sheet
Table 4.
All audio ports are LV-TTL compatible.
[1]
Table 5.
All audio ports are LV-TTL compatible.
[1]
Table 6.
All audio ports are LV-TTL compatible.
[1]
Audio port
AP5
AP4
AP3
AP2
AP1
AP0
ACLK
Audio port
AP5
AP4
AP3
AP2
AP1
AP0
ACLK
Audio port
AP5
AP4
AP3
AP2
AP1
AP0
ACLK
Can be activated with the I
Can be activated with the I
Can be activated with the I
Audio port configuration (Layout 0)
Audio port configuration (Layout 1)
Audio port configuration for HBR and DST packets
Pin
85
83
82
81
80
79
78
Pin
85
83
82
81
80
79
78
Pin
85
83
82
81
80
79
78
Layout 0
I
SYSCLK
WS (word select)
SD
SCK (I
Layout 1
I
SYSCLK
WS (word select)
SD3
SD2
SD1
SD0
SCK (I
HBR demultiplexed
I
SYSCLK
WS (word select)
SDx + 3
SDx + 2
SDx + 1
SDx
SCK (I
2
2
2
Rev. 01 — 7 August 2008
S-bus
S-bus
S-bus
64
32
64
32
64
32
2
2
2
C-bus (optional).
C-bus (optional).
C-bus (optional).
2
2
2
f
f
f
f
f
f
S-bus clock)
S-bus clock)
S-bus clock)
s
s
s
s
s
s
[1]
[1]
[1]
(ACR)
(ACR)
Quad HDMI 1.3a receiver with digital processing
S/PDIF
SYSCLK
WS
S/PDIF
master clock for S/PDIF
S/PDIF
SYSCLK
WS
S/PDIF3
S/PDIF2
S/PDIF1
S/PDIF0
master clock for S/PDIF
S/PDIF
SYSCLK
WS
S/PDIFx + 3
S/PDIFx + 2
S/PDIFx + 1
S/PDIFx
master clock for S/PDIF
64
64
64
[1]
[1]
[1]
f
f
f
s
s
s
[1]
[1]
[1]
[1]
[1]
[1]
TDA19978B
OBA
DSD channel 1
DSD channel 0
DSD clock
OBA
DSD channel 5
DSD channel 4
DSD channel 3
DSD channel 2
DSD channel 1
DSD channel 0
DSD clock
DST
frame_start
DSD channel 0
DSD clock
© NXP B.V. 2008. All rights reserved.
64
64
64
128
f
f
f
s
s
s
f
s
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