tda19978bhv NXP Semiconductors, tda19978bhv Datasheet - Page 16

• Manufacturer Part Number: tda19978bhv
• Description: Quad Hdmi 1.3a Receiver Interface With Equalizer Hdtv Up To 1080p, Up To Uxga For Pc Formats
• Manufacturer: NXP Semiconductors

NXP Semiconductors
9. I
10. Limiting values
TDA19978B_1
Product data sheet
2
C-bus protocol
8.24.2 EDID memory shared over three HDMI inputs
The TDA19978B is a slave I
and protocol for I
Bit A0 of the I
I
Table 7.
Table 8.
In accordance with the Absolute Maximum Rating System (IEC 60134).
A6
1
Symbol
V
V
I
T
2
O
Fig 4.
C-bus address is given in
V
stg
DDx(3V3)
DDx(1V8)
DD
(1) 253 bytes
EXTERNAL EDID:
+ 3 bytes input B
+ 3 bytes input C
+ 3 bytes input D
+ 1 byte address pointer (subPhys@): this indicates the address in each block where the data for
inputs B, C and D will be copied.
An example of an application with EDID shared over three HDMI inputs
256 B or 512 B
I
Limiting values
2
A5
0
C-bus slave address
Parameter
supply voltage on all 3.3 V
pins
supply voltage on all 1.8 V
pins
supply voltage difference
output current
storage temperature
2
C-bus device address is externally selected by the A0 pin. The main device
2
C-bus are standard.
A4
0
Rev. 01 — 7 August 2008
INPUT
DVI or
HDMI
Table
2
C-bus device and the SCL pin is only an input pin. The timing
7.
A3
1
INPUT
HDMI
3 B
TDA19978B
EDID: 253 B
Quad HDMI 1.3a receiver with digital processing
Conditions
INPUT
HDMI
A2
1
3 B
INPUT
HDMI
3 B
A1
0
I
2
C-bus
Min
-
0.5
0.5
0.5
55
TDA19978B
EDID CONTENT
A0
A0
FLASH
© NXP B.V. 2008. All rights reserved.
CPU
Max
+4.6
+2.5
+0.5
35
+150
001aai418
(1)
R/W
0/1
Unit
V
V
V
mA
C
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