at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 35
at85c51snd3b
Manufacturer Part Number
at85c51snd3b
Description
Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet
1.AT85C51SND3B.pdf
(270 pages)
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7632C–MP3–11/06
Table 32. CKEN Register
CKEN (0.B9h) – Clock Enable Register
Reset Value = 0000 0000b
CKGENE
Number
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
DNFCKEN
SIOCKEN
MMCKEN
CKGENE
PLOCK
PLLEN
PLLEN
Bit
6
-
-
Clock Generator Enable Bit
Set to enable the clock generator.
Clear to disable the clock generators.
PLL Enable Bit
Set to enable the 480 MHz PLL.
Clear to disable the 480 MHz PLL.
Reserved
The value read from this bit is always 0. Do not set this bit.
PLL Lock Flag
Set by hardware when the PLL is locked.
Cleared by hardware when the PLL is not locked.
MMC Controller Clock Enable Bit
Set to enable the MMC controller Clock.
Clear to disable the MMC controller Clock.
Reserved
The value read from this bit is always 0. Do not set this bit.
SIO Controller Clock Enable Bit
Set to enable the SIO Clock.
Clear to disable the SIO Clock.
DF Controller / NF Controller Clock Enable Bit
Set to enable the DFC/NFC Clock.
Clear to disable the DFC/NFC Clock.
5
-
PLOCK
4
MMCKEN
3
AT85C51SND3B
2
-
SIOCKEN
1
DNFCKEN
0
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