at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 75
at85c51snd3b
Manufacturer Part Number
at85c51snd3b
Description
Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet
1.AT85C51SND3B.pdf
(270 pages)
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Watchdog Timer
Description
Clock Controller
7632C–MP3–11/06
The AT85C51SND3B derivatives implement a hardware Watchdog Timer (WDT) that
automatically resets the chip if it is allowed to time out. The WDT provides a means of
recovering from routines that do not complete successfully due to software or hardware
malfunctions.
The WDT consists of a 14-bit prescaler followed by a 7-bit programmable counter. As
shown in Figure 42, the 14-bit prescaler is fed by the WDT clock detailed in
Section “Clock Controller”.
The Watchdog Timer Reset register (WDTRST, see Table 89) provides control access
to the WDT, while the Watchdog Timer Program register (WDTPRG, see Figure 90) pro-
vides time-out period programming.
Three operations control the WDT:
•
•
•
Figure 42. WDT Block Diagram
As shown in Figure 43 the WDT clock (F
(F
T h e s e c l o c k s a r e i s s u e d f r o m t h e C l o c k C o n t r o l l e r b l o c k a s d e t a i l e d i n
Section “Oscillator”, page 28. When WTX2 bit is set, the WDT clock frequency is fixed
and equal to the oscillator clock frequency divided by 2. When cleared, the WDT clock
frequency is equal to the oscillator clock frequency divided by 2 in standard mode or to
the oscillator clock frequency in X2 mode.
Figure 43. WDT Clock Controller and Symbol
System
CLOCK
Reset
WDT
PER
CLOCK
CLOCK
Chip reset clears and disables the WDT.
Programming the time-out value to the WDTPRG register.
Writing a specific 2-Byte 1Eh-E1h sequence to the WDTRST register clears and
enables the WDT.
PER
OSC
) or the oscillator clock (F
RST
÷ 6
1Eh-E1h Decoder
÷ 2
WDTRST
CKCON.6
WTX2
0
1
RST
MATCH
14-bit Prescaler
OSC
EN
) depending on the WTX2 bit in CKCON register.
WDT
WDT Clock
) is derived from either the peripheral clock
CLOCK
OSC
RST
7-bit Counter
AT85C51SND3B
WDTPRG.2:0
WTO2:0
SET
Pulse Generator
OV
WDT Clock Symbol
CLOCK
WDT
To internal
reset
RST
75
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