at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 84

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at85c51snd3b

Manufacturer Part Number
at85c51snd3b
Description
Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet

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84
AT85C51SND3B
Table 97. DFD0 Register
DFD0 (1.8Ah) – DFC Channel 0 Data Flow Descriptor Register
Reset Value = 0000 0000b
Table 98. DFD1 Register
DFD1 (1.8Bh) – DFC Channel 1 Data Flow Descriptor Register
Reset Value = 0000 0000b
Table 99. DFCRC Register
DFCRC (1.8Ch) – DFC CRC Data Register
Reset Value = 0000 0000b
DFD0D7
Number
DFD1D7
Number
Number
CRCD7
7-0
7-0
7-0
Bit
Bit
Bit
7
7
7
Mnemonic Description
Mnemonic Description
Mnemonic Description
DFD0D7:0
DFD1D7:0
CRCD7:0
DFD0D6
DFD1D6
CRCD6
Bit
Bit
Bit
6
6
6
Channel 0 Data Flow Descriptor Data
Write data flow descriptor to this register as detailed in Table 91.
Read to get the remaining number of data packet after a delayed abort. MSB is
read first.
Channel 1 Data Flow Descriptor Data
Write data flow descriptor to this register as detailed in Table 91.
Read to get the remaining number of data packet after a delayed abort. MSB is
read first.
CRC 2-byte Data FIFO
First reading of DFCRC returns the MSB of the CRC16 data while second
reading returns the LSB.
First writing to DFCRC writes the MSB of the initial value of the CRC16 data
while second writing writes the LSB.
DFD0D5
DFD1D5
CRCD5
5
5
5
DFD0D4
DFD1D4
CRCD4
4
4
4
DFD0D3
DFD1D3
CRCD3
3
3
3
DFD0D2
DFD1D2
CRCD2
2
2
2
DFD0D1
DFD1D1
CRCD1
1
1
1
7632C–MP3–11/06
DFD0D0
DFD1D0
CRCD0
0
0
0

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