pxb4330 Infineon Technologies Corporation, pxb4330 Datasheet - Page 157

• Manufacturer Part Number: pxb4330
• Description: Ics For Communications
• Manufacturer: Infineon Technologies Corporation

Register 50 MAR
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
Start
MAR(4:0)
Data Sheet
15
Unused(1:0)
7
Memory Address Register
14
This command bit starts the Read-Modify-Write procedure to the
internal RAM/table addressed by bit-field MAR(4:0). The specific
data transfer and mask registers must be prepared appropriately in
advance.
This bit is automatically cleared after completion of the Read-
Modify-Write procedure.
Memory Address
This bit-field selects one of the internal RAMs/tables for Read-
Modify-Write operation:
00000
00001
00010
00011
10001
11001
10000
6
Read/Write
0000
MAR
Written by CPU to address internal RAMs/tables for
Read-Modify-Write operation via transfer registers
H
Start
13
5
QCT: Queue Configuration Table (see page 102)
Queue Parameter Table (see page 123)
Queue Parameter Table (see page 123)
QPT Low Word Upstream:
Queue Parameter Table( see page 123)
LCI: LCI Table RAM (see page 89)
TCT: Traffic Class Table (see page 93)
SOT: Scheduler Occupation Table (see page 107)
QPT High Word Upstream:
QPT High Word Downstream:
D7
H
12
Unused(9:2)
4
6-157
11
3
MAR(4:0)
10
2
Register Descriptions
9
1
PXB 4330
8
0
09.99