pxb4330 Infineon Technologies Corporation, pxb4330 Datasheet - Page 49

• Manufacturer Part Number: pxb4330
• Description: Ics For Communications
• Manufacturer: Infineon Technologies Corporation

4
This section describes the ABM from the microprocessor point of view.
4.1
These actions are to be performed after reset to prepare the ABM chip for operation.
• Check register Reset salues
• Initialize SDRAM
• Reset internal tables (RAMs)
• Set hardware configuration (UTOPIA configuration)
• Initialize traffic class tables
• Check data path (via adjacent ATM devices)
ABM diagnostic possibilities:
• Check all internal RAMs and register values
4.2
• Set MODE register
• Configure UTOPIA interfaces: mode, number of PHYs
• Set empty rate generator (for SDRAM refresh)
• Set parameter MaxBurstS(3:0), page 6-140 of the output Multiplexer (Figure 3-1) and
• Set global thresholds
• Programming of Scheduler output rates
• Assignment of Schedulers to PHYs at switch egress side
• Assignment of Schedulers to switch outputs at ingress side
4.3
To set up a connection, the complete linked list must be established:
LCI
LCI
(see Figure 4-1). Additionally, the bandwidth and buffer space reservations must be per-
formed (see below). Depending on the traffic class, special functions must be enabled;
for example: ABR feedback enable or EPD/PPD for UBR.
Data Sheet
(Uni-directional Mode or Bi-directional Mode)
the parameter CDVMAX(8:0), page 6-120 of the Peak Rate Limiter (Figure 3-1)
Queue ID
Queue ID
Operational Description
Initialization and Test
Global Configuration
Connection Setup
Scheduler and
Traffic Class
4-49
Operational Description
PXB 4330
09.99