w83627thg Winbond Electronics Corp America, w83627thg Datasheet - Page 50

• Manufacturer Part Number: w83627thg
• Description: Winbond Lpc I/o
• Manufacturer: Winbond Electronics Corp America

Bit 7~6: Reserved.
Bit 5: AUXFANIN output value if FANINC3 sets to 0. Write 1, pin 5 generates a logic high signal. Write
Bit 4: AUXFANIN Input Control. Set to 1, pin 5 acts as FAN tachometer input, which is default value.
Bit 3: CPUFANIN output value if FANINC2 sets to 0. Write 1, then pin 112 always generate logic high
Bit 2: CPUFANIN Input Control. Set to 1, pin 112 acts as FAN tachometer input, which is default value.
Bit 1: SYSFANIN output value if FANINC1 sets to 0. Write 1, then pin 113 always generate logic high
Bit 0: SYSFANIN Input Control. Set to 1, pin 113 acts as FAN tachometer input, which is default value.
5.8.16 Register 50h ~ 5Fh Bank Select Register - Index 4Eh
Register Location:
Power on Default Value
Attribute:
Size:
Bit 7: HBACS- High byte access. Set to 1, access Register 4Fh high byte register.
Bit 6-3: Reserved. This bit should be set to 0.
Bit 2-0: Index ports 0x50~0x5F Bank select.
0, pin 5 generates a logic low signal. This bit is default 0.
Set to 0, this pin 5 acts as FAN control signal and the output value of FAN control is set by this
register bit 5.
Set to 0, this pin 112 acts as FAN control signal and the output value of FAN control is set by
this register bit 3.
Set to 0, this pin 113 acts as FAN control signal and the output value of FAN control is set by
this register bit 1.
Set to 0, select Bank0.
Set to 1, select Bank1.
Set to 2, select Bank2.
signal. Write 0, pin 112 always generates logic low signal. This bit default 0.
signal. Write 0, pin 113 always generates logic low signal. This bit default 0.
Set to 0, access Register 4Fh low byte register. Default 1.
7
6
4Eh
80h
Read/Write
8 bits
5
4
3
2
- 43 -
1
0
W83627THF/W83627THG
Publication Release Date: September 26, 2006
BANKSEL0
BANKSEL1
BANKSEL2
Reserved
Reserved
Reserved
Reserved
HBACS
Revision 1.2