tea1753lt NXP Semiconductors, tea1753lt Datasheet - Page 10

• Manufacturer Part Number: tea1753lt
• Description: Tea1753lt Greenchip Iii Smps Control Ic
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TEA1753LT
Objective data sheet
7.2.2 Valley switching and demagnetization (PFCAUX pin)
7.2.3 Frequency limitation
7.2.4 Mains voltage compensation (VINSENSE pin)
7.2.5 Soft start-up (pin PFCSENSE)
The PFC MOSFET is switched on after the transformer is demagnetized. Internal circuitry
connected to the PFCAUX pin detects the end of the secondary stroke. It also detects the
voltage across the PFC MOSFET. The next stroke is started if the voltage across the PFC
MOSFET is at its minimum in order to reduce switching losses and
ElectroMagnetic Interference (EMI) (valley switching).
If no demagnetization signal is detected on the PFCAUX pin, the controller generates a
Zero Current Signal (ZCS), 50 s after the last PFCGATE signal.
If no valley signal is detected on the PFCAUX pin, the controller generates a valley signal
4 s after demagnetization is detected.
To protect the internal circuitry during lightning events, for example, it is advisable to add a
5 k series resistor to this pin. To prevent incorrect switching due to external disturbance,
the resistor should be placed close to the IC on the printed-circuit board.
To optimize the transformer and minimize switching losses, the switching frequency is
limited to f
limit, the system switches over to discontinuous conduction mode. Also here, the PFC
MOSFET is only switched on at a minimum voltage across the switch (valley switching).
The mathematical equation for the transfer function of a power factor corrector contains
the square of the mains input voltage. In a typical application this results in a low
bandwidth for low mains input voltages, while at high mains input voltages the Mains
Harmonic Reduction (MHR) requirements may be hard to meet.
To compensate for the mains input voltage influence, TEA1753LT contains a correction
circuit. Via the VINSENSE pin the average input voltage is measured and the information
is fed to an internal compensation circuit. With this compensation it is possible to keep the
regulation loop bandwidth constant over the full mains input range, yielding a fast transient
response on load steps, while still complying with class-D MHR requirements.
In a typical application, the bandwidth of the regulation loop is set by a resistor and two
capacitors on the PFCCOMP pin.
To prevent audible transformer noise at start-up or during hiccup, the transformer peak
current, I
inserting R
An internal current source charges the capacitor as calculated in
The voltage is limited to V
The start level and the time constant of the increasing primary current level can be
adjusted externally by changing the values of R
V
softstart
PFCSENSE
DM
sw(PFC)max
SS1
=
, is increased slowly by the soft start function. This can be achieved by
=
3
I
and C
start soft

All information provided in this document is subject to legal disclaimers.
R
SS1

. If the frequency for quasi-resonant operation is above the f
SS1

PFC
Rev. 01 — 4 March 2011
C
between pin PFCSENSE and current sense resistor R
SS1
start(soft)PFC

R
SS1
.
SS1
and C
GreenChip III SMPS control IC
SS1
.
Equation 1
TEA1753LT
© NXP B.V. 2011. All rights reserved.
and the
SENSE1
sw(PFC)max
10 of 31
.
(1)
(2)