tea1753lt NXP Semiconductors, tea1753lt Datasheet - Page 9

• Manufacturer Part Number: tea1753lt
• Description: Tea1753lt Greenchip Iii Smps Control Ic
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TEA1753LT
Objective data sheet
7.1.3 Supply management
7.1.4 Latch input
7.1.5 Fast latch reset
7.1.6 Overtemperature protection
7.2.1 t
7.2 Power factor correction circuit
All internal reference voltages are derived from a temperature compensated and trimmed
on-chip band gap circuit. Internal reference currents are derived from a temperature
compensated and trimmed on-chip current reference circuit.
Pin LATCH is a general purpose input pin, which is used to switch off both converters. The
pin sources a current I
as the voltage on this pin drops below 1.25 V.
At initial start-up the switching is inhibited until the capacitor on the LATCH pin is charged
above 1.35 V. No internal filtering is done on this pin. An internal zener clamp of 2.9 V
protects this pin from excessive voltages.
In a typical application the mains can be interrupted briefly to reset the latched protection.
The PFC bus capacitor, C
reset.
The PFC bus capacitor, C
When the latched protection is set, the clamping circuit of the VINSENSE circuit is
disabled. (see also
750 mV and after that is raised to 870 mV, the latched protection is reset.
The latched protection is also reset by removing both the voltage on pin V
pin HV.
An accurate internal temperature protection is provided in the circuit. When the junction
temperature exceeds the thermal shut-down temperature, the IC stops switching. As long
as OTP is active, the capacitor C
is supplied from the HV pin if the V
OTP is a latched protection. It is reset by removing both the voltage on pin V
HV or by the fast latch reset function. (See
The power factor correction circuit operates in quasi-resonant or discontinuous
conduction mode with valley switching. The next primary stroke is only started when the
previous secondary stroke has ended and the voltage across the PFC MOSFET has
reached a minimum value. The voltage on the PFCAUX pin is used to detect transformer
demagnetization and the minimum voltage across the external PFC MOSFET switch.
The power factor correction circuit is operated in t
reduction of a typical application is well within the class-D requirements.
on
control
All information provided in this document is subject to legal disclaimers.
Section
O(LATCH)
Rev. 01 — 4 March 2011
bus
bus
7.2.10) As soon as the VINSENSE voltage drops below
, does not have to discharge for this latched protection to
, must discharge to allow the V
of 80 A. Switching off both converters is stopped as soon
VCC
CC
is not recharged from the HV mains. The OTP circuit
supply voltage is not sufficient.
Section
on
7.1.5)
control. The resulting mains harmonic
GreenChip III SMPS control IC
CC
to drop to the reset level.
TEA1753LT
© NXP B.V. 2011. All rights reserved.
CC
CC
and on
and on pin
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