tea1753lt NXP Semiconductors, tea1753lt Datasheet - Page 16

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tea1753lt

Manufacturer Part Number
tea1753lt
Description
Tea1753lt Greenchip Iii Smps Control Ic
Manufacturer
NXP Semiconductors
Datasheet

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TEA1753LT
Objective data sheet
7.3.4 Demagnetization (FBAUX pin)
7.3.5 Flyback control / time-out (FBCTRL pin)
The driver output is latched in the logic, preventing multiple switch-on.
The system is always in quasi-resonant or discontinuous conduction mode. The internal
oscillator does not start a new primary stroke until the previous secondary stroke has
ended.
Demagnetization features a cycle-by-cycle output short circuit protection by immediately
lowering the frequency (longer off-time), thereby reducing the power level.
Demagnetization recognition is suppressed during the first t
suppression may be necessary at low output voltages and at start-up and in applications
where the transformer has a large leakage inductance.
If pin FBAUX is open circuit or not connected, a fault condition is assumed and the
converter stops operating immediately. Operation restarts as soon as the fault condition is
removed.
The pin FBCTRL is connected to an internal voltage source of 3.5 V via an internal
resistor of 3 k. As soon as the voltage on this pin exceeds 2.5 V, the connection is
disabled and the pin is biased with a small current. When the voltage on this pin exceeds
4.5 V, a fault is assumed, switching is inhibited and a latched protection is activated.
When a small capacitor is connected to this pin, a time-out function is created to protect
against an open control loop situation. (see
function is disabled by connecting a resistor (100 k) to ground on the FBCTRL pin.
If the pin is shorted to ground, switching of the flyback controller is inhibited.
During normal operating conditions, when the converter is regulating the output voltage,
the voltage on the FBCTRL pin is between 1.4 V and 2.0 V from minimum to maximum
output power.
Fig 11. Peak current control of flyback part
V
peak voltage
sense(fb)max
FBSENSE
All information provided in this document is subject to legal disclaimers.
0.325 V
0.65 V
Rev. 01 — 4 March 2011
cycle skip
flyback
mode
flyback
frequency
reduction
PFC off
PFC on
1.5 V
Figure 12
2.0 V
discontinuous
flyback
or QR
V
and
FBCTRL
GreenChip III SMPS control IC
Figure
SENSE resistor
peak voltage
sup(xfmr_ring)
TEA1753LT
13) The time-out
offset voltage
FBSENSE
014aaa747
© NXP B.V. 2011. All rights reserved.
time of 2 s. This
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