w9425g6jb Winbond Electronics Corp America, w9425g6jb Datasheet - Page 16

• Manufacturer Part Number: w9425g6jb
• Manufacturer: Winbond Electronics Corp America

7.10.3 CAS Latency field (A6 to A4)
7.10.4 DLL Reset bit (A8)
7.10.5 Mode Register /Extended Mode register change bits (BA0, BA1)
7.10.6 Extended Mode Register field
7.10.7 Reserved field
This bit is used to reset DLL. When the A8 bit is "1", DLL is reset.
These bits are used to select MRS/EMRS.
1) DLL Switch field (A0)
2) Output Driver Size Control field (A6, A1)
This field specifies the number of clock cycles from the assertion of the Read command to the first
data read. The minimum values of CAS Latency depend on the frequency of CLK.
• Test mode entry bit (A7)
• Reserved bits (A9, A10, A11, A12)
The 100%, 60% and 30% or matched impedance driver strength are required Extended Mode
Register Set (EMRS) as the following:
This bit is used to select DLL enable or disable
BA1
A6
0
0
0
0
1
1
1
1
This bit is used to enter Test mode and must be set to "0" for normal operation.
These bits are reserved for future operations. They must be set to "0" for normal operation.
0
0
1
A0
A6
0
1
0
0
1
1
A5
0
0
1
1
0
0
1
1
BA0
0
1
x
A1
0
1
0
1
A4
0
1
0
1
0
1
0
1
- 16 -
Extended MRS Cycle
Regular MRS Cycle
Disable
Enable
DLL
Reserved
A12-A0
Publication Release Date: Oct. 08, 2010
BUFFER STRENGTH
CAS LATENCY
Reserved
Reserved
Reserved
Reserved
Reserved
100% Strength
60% Strength
30% Strength
Reserved
2.5
2
3
W9425G6JB
Revision A01