w9425g6jb Winbond Electronics Corp America, w9425g6jb Datasheet - Page 28

• Manufacturer Part Number: w9425g6jb
• Manufacturer: Winbond Electronics Corp America

(12) V
(13) V
(14) V
(15) Refer to the figure below.
(16) t
(17) A maximum of eight AUTO REFRESH commands can be posted to any given DDR SDRAM device.
(18) t
(19) For command/address input slew rate ≥1.0 V/nS.
(20) For command/address input slew rate ≥0.5 V/nS and <1.0 V/nS.
(21) For CLK & CLK slew rate ≥1.0 V/nS (single--ended).
(22) These parameters guarantee device timing, but they are not necessarily tested on each device. They may be
(23) Slew Rate is measured between V
guaranteed by device design or tester correlation.
For each of the terms above, if not already an integer, round to the next highest integer.
Example: For -5 speed grade at CL=2.5 and tCK=6 nS
t
AC
DAL
DAL
X
ID
ISO
0 V Differential
is the differential clock cross point voltage where input timing measurement is referenced.
and t
is magnitude of the difference between CLK input level and CLK input level.
= (t
= ((15 nS / 6 nS) + (15 nS / 6 nS)) clocks = ((3) + (3)) clocks = 6 clocks
means {V
WR
DQSCK
V
/t
ID(AC)
CLK
CLK
V
CK
V
V
ISO
SS
SS
) + (t
ICK
depend on the clock jitter. These timing are measured at stable clock.
(CLK)+V
V
ICK
RP
V
/t
X
CK
)
ICK
( CLK )}/2.
V
ISO(min)
OH
V
(ac) and V
V
ICK
X
OL
(ac).
- 28 -
V
X
V
ISO(max)
V
ICK
Publication Release Date: Oct. 08, 2010
V
X
V
ICK
W9425G6JB
V
X
V
ID(AC)
Revision A01