tza3017hw NXP Semiconductors, tza3017hw Datasheet - Page 8

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tza3017hw

Manufacturer Part Number
tza3017hw
Description
30 Mbits/s Up To 3.2 Gbits/s A-rate Fibre Optic Transmitter
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
Programming the reference clock
Pre-programmed operation requires a reference clock
frequency of between 18 and 21 MHz connected to
pins CREF and CREFQ. However, to obtain the bit rates in
Table 3, the reference clock frequency must be
19.44 MHz. For SDH/SONET applications, a reference
clock frequency of 19.44
I
reference clock frequency ranges to be selected by
programming reference divider R using bits REFDIV in
I
The REFDIV bit settings, reference clock frequency
ranges, and division factor are shown in Table 4.
The reference frequency is always divided internally to the
lowest range of 18 to 21 MHz.
2003 May 14
2
2
handbook, full pagewidth
C-bus control operation allows any one of four possible
C-bus register SYNTHCNF (address B6H).
30 Mbits/s up to 3.2 Gbits/s
A-rate fibre optic transmitter
PRSCLOQ
PRSCLO
CREFQ
CREF
R MHz is preferred.
REFERENCE
DIVIDER
R
Fig.3 Block diagram of the clock synthesizer.
FREQUENCY
DETECTOR
PHASE-
LOL
down
up
8
Table 4 Truth table for bits REFDIV in I
REFDIV
CHARGE-PUMP
CALCULATOR
LOOP FILTER
N[8:0] K[21:0]
00
01
10
11
FRACTION
DIVIDER
9
MAIN
AND
N
9
SYNTHCNF
DIVISION
22
FACTOR
R
1
2
4
8
VCO
MGW561
FREQUENCY
REFERENCE
SDH/SONET
155.52
OCTAVE
DIVIDER
(MHz)
19.44
38.88
77.76
M
TZA3017HW
Product specification
2
C-bus register
to
MUX
FREQUENCY
REFERENCE
144 to 168
RANGE
18 to 21
36 to 42
72 to 84
(MHz)

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