zl2103 Intersil Corporation, zl2103 Datasheet - Page 12

• Manufacturer Part Number: zl2103
• Description: 3a Digital-dc Synchronous Step-down Dc/dc Converter
• Manufacturer: Intersil Corporation

In general, the size of components L
overall efficiency of the circuit are inversely proportional to the
switching frequency, f
may be realized by switching the MOSFETs at the lowest possible
frequency; however, this will result in the largest component size.
Conversely, the smallest possible footprint may be realized by
switching at the fastest possible frequency but this gives a
somewhat lower efficiency. Each user should determine the
optimal combination of size and efficiency when determining the
switching frequency for each application.
The block diagram for the ZL2103 is illustrated in Figure 10. In this
circuit, the target output voltage is regulated by connecting the VSEN
pin directly to the output regulation point. The VSEN signal is then
compared to an internal reference voltage that had been set to the
desired output voltage level by the user. The error signal derived from
this comparison is converted to a digital value with an analog to digital
(A/D) converter. The digital signal is also applied to an adjustable
digital compensation filter and the compensated signal is used to
derive the appropriate PWM duty cycle for driving the internal
MOSFETs in a way that produces the desired output.
Power Management Overview
The ZL2103 incorporates a wide range of configurable power
management features that are simple to implement without
additional components. Also, the ZL2103 includes circuit
protection features that continuously safeguard the device and
load from damage due to unexpected system faults. The ZL2103
can continuously monitor input voltage, output voltage/current
and internal temperature. A Power-good output signal is also
included to enable power-on reset functionality for an external
processor.
All power management functions can be configured using either
pin configuration techniques (see Figure 12) or via the
I
pre-configured to provide alerts for specific conditions. See
Application Note
Multi-mode Pins
In order to simplify circuit design, the ZL2103 incorporates
patented multi-mode pins that allow the user to easily configure
many aspects of the device without programming. Most power
management features can be configured using these pins. The
multi-mode pins can respond to four different connections, as
shown in Table 1. These pins are sampled when power is applied
or by issuing a PMBus Restore command (see Application Note
AN2033).
PIN-STRAP SETTINGS
This is the simplest method, as no additional components are
required. Using this method, each pin can take on one of three
possible states: LOW, OPEN, or HIGH. These pins can be
connected to the V2P5 pin for logic HIGH settings as this pin
provides a regulated voltage higher than 2V. Using a single pin
one of three settings can be selected.
2
C/SMBus interface. Monitoring parameters can also be
AN2033
SW
. Therefore, the highest efficiency circuit
for more details on SMBus monitoring.
12
1
and C
OUT
as well as the
ZL2103
RESISTOR SETTINGS
This method allows a greater range of adjustability when
connecting a finite value resistor (in a specified range) between
the multi-mode pin and SGND.
Standard 1% resistor values are used, and only every fourth E96
resistor value is used so the device can reliably recognize the
value of resistance connected to the pin while eliminating the
error associated with the resistor accuracy. Up to 31 unique
selections are available using a single resistor.
I
ZL2103 functions can be configured via the I
using standard PMBus commands. Additionally, any value that
has been configured using the pin-strap or resistor setting
methods can also be re-configured and/or verified via the
I
The SMBus device address and VOUT_MAX are the only
parameters that must be set by external pins. All other device
parameters can be set via the I
set using the SA pin. VOUT_MAX is determined as 10% greater
than the voltage set by the VSET pin.
Resistor pin-straps are recommended to be used for all available
device parameters to allow a safe initial power-up before
configuration is stored via the I
be accomplished by pin-strapping the undervoltage lockout
threshold (using SS pin) to a value greater than the expected
input voltage, thus preventing the device from enabling prior to
loading a configuration file.
2
2
C/SMBus. See Application Note
C/SMBUS METHOD
FIGURE 12. PIN-STRAP AND RESISTOR SETTING EXAMPLES
Open
Resistor to SGND
Logic
Logic
high
low
(Logic HIGH)
PIN TIED TO
(Logic LOW)
OPEN
(N/C)
HIGH
TABLE 1. MULTI-MODE PIN CONFIGURATION
LOW
Multi- mode Pin
Pinstrap
Settings
ZL
2
2
C/SMBus. For example, this can
C/SMBus. The device address is
AN2033
R
SET
Set by resistor value
No connection
Multi- mode Pin
for more details.
< 0.8VDC
> 2.0VDC
VALUE
2
C/SMBus interface
Resistor
Settings
ZL
May 3, 2011
FN6966.5