atmega103 ATMEL Corporation, atmega103 Datasheet - Page 107

• Manufacturer Part Number: atmega103
• Description: Atmega103 8-bit With 128k Bytes Of In-system Programmable Flash
• Manufacturer: ATMEL Corporation

Enter Programming Mode
Chip Erase
Programming the Flash
0945I–AVR–02/07
The following algorithm puts the device in Parallel Programming mode:
1. Apply supply voltage according to Table 36, between V
2. Set RESET and BS1 pins to “0” and wait at least 100 ns.
3. Apply 11.5 - 12.5V to RESET. Any activity on BS1 within 100 ns after +12V has
The Chip Erase will erase the Flash and EEPROM memories, and Lock bits. The Lock
bits are not reset until the Program memory has been completely erased. The Fuse bits
are not changed. A chip erase must be performed before the Flash or EEPROM is
reprogrammed.
Load Command “Chip Erase”
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set BS1 to “0”.
3. Set DATA to “1000 0000”. This is the command for Chip Erase.
4. Give XTAL1 a positive pulse. This loads the command.
5. Give WR a
Table 40. Minimum WR Pulse Width for Chip Erase
The Flash is organized as 512 pages of 256 bytes each. When programming the Flash,
the program data is latched into a page buffer. This allows one page of program data to
be programmed simultaneously. The following procedure describes how to program the
entire Flash memory:
A: Load Command “Write Flash”.
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set BS1 to “0”.
3. Set DATA to “0001 0000”. This is the command for Write Flash.
4. Give XTAL1 a positive pulse. This loads the command.
B: Load Address Low Byte.
1. Set XA1, XA0 to “00”. This enables address loading.
2. Set BS1 to “0”. This selects low address.
3. Set DATA = Address Low Byte ($00 - $FF)
4. Give XTAL1 a positive pulse. This loads the address Low Byte.
C: Load Data Low Byte.
1. Set BS1 to “0”. This selects low data.
2. Set XA1, XA0 to “01”. This enables data loading.
3. Set DATA = Data Low Byte ($00 - $FF).
4. Give XTAL1 a positive pulse. This loads the data byte.
D: Latch Data Low Byte.
1. Give PAGEL a positive pulse. This latches the data Low Byte.
(See Figure 73 for signal waveforms.)
Symbol
t
WLWH_CE
been applied to RESET will cause the device to fail entering Programming mode.
t
WLWH_CE
value. Chip Erase does not generate any activity on the RDY/BSY pin.
t
WLWH_CE
wide negative pulse to execute Chip Erase. See Table 40 for
56 ms
3.2V
43 ms
3.6V
CC
ATmega103(L)
35 ms
4.0V
and GND.
22 ms
5.0V
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