cop8tac9 National Semiconductor Corporation, cop8tac9 Datasheet - Page 12

no-image

cop8tac9

Manufacturer Part Number
cop8tac9
Description
8-bit Cmos Flash Microcontroller With 2k Byte Or 4k Byte Memory
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
SDA Hold Time (t
SDA Valid Time (t
8.0 Electrical Characteristics
Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 2: t
Note 3: Maximum rate of voltage change must be
Note 4: Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, inputs connected to V
to a load.
Note 5: The HALT mode will stop CKI from oscillating in the R/C and the Crystal configurations. CKI is TRI-STATE. Measurement of I
neither sourcing nor sinking current; with L. F, C, G0, and G2–G5 programmed as low outputs and not driving a load; all outputs programmed low and not driving
a load; all inputs tied to V
Note 6: The ACCESS.Bus interface of the COP8TAB9/TAC9 device implements and meets the timings necessary for interface to the I
logic levels. The bus drivers are designed with open-drain outputs, as required for proper bidirectional operation. The device will not meet the AC timing and
current/voltage drive requirements of the full bus specifications.
C
= Instruction cycle time (Clock input frequency divided by 10).
SDAho
AC Electrical Characteristics −40˚C ≤ T
SDAso
Parameter
CC
) Figure 4
) Figure 4
; WATCHDOG and clock monitor disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register.
FIGURE 2. ACB Start and Stop Condition Timing
<
0.5 V/ms.
FIGURE 1. MICROWIRE/PLUS Timing
(Continued)
After SCL FE
Before SCL RE
A
≤ +85˚C unless otherwise specified. (Continued)
12
Conditions
20047582
Min
7
7
CC
and outputs driven low but not connected
Typ
DD
2
C and SMBus protocols at
HALT is done with device
Max
20047583
Units
mclk
mclk

Related parts for cop8tac9