cop8tac9 National Semiconductor Corporation, cop8tac9 Datasheet - Page 22

• Manufacturer Part Number: cop8tac9
• Description: 8-bit Cmos Flash Microcontroller With 2k Byte Or 4k Byte Memory
• Manufacturer: National Semiconductor Corporation

www.national.com
11.0 In-System Programming
routine or external programming is being used to program
the device. If using the MICROWIRE/PLUS ISP routine, the
software in the boot ROM will monitor the MICROWIRE/
PLUS for commands to program the Flash memory. When
programming the Flash program memory is complete, the
FLEX bit will have to be programmed to a 1 and the device
will have to be reset, either by pulling external Reset to
ground or by a MICROWIRE/PLUS ISP EXIT command,
before execution from Flash program memory will occur.
If FLEX = 1, upon exiting Reset, the device will begin ex-
ecuting from location 0000 in the Flash program memory.
The assumption, here, is that either the application is not
using ISP, is using MICROWIRE/PLUS ISP by jumping to it
within the application code, or is using a customized ISP
routine. If a customized ISP routine is being used, then it
must be programmed into the Flash memory by means of
the MICROWIRE/PLUS ISP or external programming as
described in the preceding paragraph.
11.3 REGISTERS
There are six registers required to support ISP: Address
Register Hi byte (ISPADHI), Address Register Low byte
(ISPADLO), Read Data Register (ISPRD), Write Data Reg-
ister (ISPWR), Write Timing Register (PGMTIM), and the
Control Register (ISPCNTRL). The ISPCNTRL Register is
not available to the user. None of these six registers, which
support ISP, have been implemented in the COP8TAx5 ROM
based devices.
11.3.1 ISP Address Registers
The address registers (ISPADHI & ISPADLO) are used to
specify the address of the byte of data being written or read.
For page erase operations, the address of the beginning of
the page should be loaded. For mass erase operations,
0000 must be placed into the address registers. When read-
ing the Option register, 07FF (hex) should be placed into the
address registers of COP8TAB9 devices and 0FFF (hex)
should be placed into the address registers of COP8TAC9
devices. Registers ISPADHI and ISPADLO are cleared to 00
on Reset.
Note: The actual memory address of the Option Register is
0x0FFF (hex), however the MICROWIRE/PLUS ISP routines
require the address FFFF (hex) to be used to read the
Option Register when the Flash Memory is secured.
(Continued)
Addr 15 Addr 14
Bit 7
7
0
0
0
0
0
Bit 6
TABLE 6. High Byte of ISP Address
6
0
0
0
0
0
Addr 13
Bit 5
Addr 12 Addr 11 Addr 10
Bit 4
ISPADHi
5
0
0
0
0
0
Bit 3
Bit 2
4
0
0
0
0
0
Register Bit
TABLE 10. PGMTIM Register Format
Addr 9
Bit 1
3
0
0
0
0
0
Addr 8
Bit 0
PGMTIM
22
2
0
0
0
1
1
11.3.2 ISP Read Data Register
The Read Data Register (ISPRD) contains the value read
back from a read operation. This register is undefined on
Reset.
11.3.3 ISP Write Data Register
The Write Data Register (ISPWR) contains the data to be
written into the specified address. This register is undeter-
mined on Reset.
11.3.4 ISP Write Timing Register
The Write Timing Register (PGMTIM) is used to control the
width of the timing pulses for write and erase operations. The
value to be written into this register is dependent on the
frequency of CKI and is shown in Table 10. This register
must be written before any write or erase operation can take
place. It only needs to be loaded once, for each value of CKI
frequency. The MICROWIRE/PLUS ISP routine that is resi-
dent in the boot ROM requires that this register be defined
prior to any access to the Flash memory. Refer to Section
11.7 MICROWIRE/PLUS ISP for more information on avail-
able ISP commands. On Reset, the PGMTIM register is
loaded with the value that corresponds to 10 MHz frequency
for CKI. The best choice for value of PGMTIM will center the
operating frequency in the CKI Frequency Range.
Bit 7
Bit 7
Addr 7
Bit7
Bit7
Bit 7
Bit 6
Bit 6
Bit6
Bit6
1
0
0
1
0
1
Addr 6
Bit 6
TABLE 7. Low Byte of ISP Address
TABLE 9. ISP Write Data Register
TABLE 8. ISP Read Data Register
Bit 5
Bit 5
Addr 5
Bit5
Bit5
Bit 5
0
0
1
0
0
1
Addr 4
Bit 4
Bit 4
Bit 4
Bit4
Bit4
ISPADLO
ISPWR
ISPRD
Addr 3
Bit 3
Bit 3
Bit3
Bit3
Bit 3
CKI Frequency Range
125 kHz–250 kHz
200 kHz–400 kHz
50 kHz–100 kHz
75 kHz–150 kHz
25 kHz–50 kHz
Bit 2
Bit 2
Addr 2
Bit2
Bit2
Bit 2
Addr 1
Bit 1
Bit 1
Bit 1
Bit1
Bit1
Addr 0
Bit 0
Bit 0
Bit 0
Bit0
Bit0