x5001pzi Intersil Corporation, x5001pzi Datasheet - Page 15

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x5001pzi

Manufacturer Part Number
x5001pzi
Description
Cpu Supervisor
Manufacturer
Intersil Corporation
Datasheet
Figure 13. CS vs. RESET Timing
RESET Output Timing
V
TRIP
(V
Symbol
TRIP
t
SCK
t
t
V
WDO
V
CST
RST
Programming Timing Diagram
CS
CC
PE
SI
)
V
P
Watchdog timeout period,
CS pulse width to reset the watchdog
Reset Timeout
WD
WD
WD
1
1
1
t
VPS
RESET
= 1, WD
= 0, WD
= 0, WD
15
CS
03h
0
0
0
Parameter
= 0
= 1
= 0
0001h
t
WDO
t
CST
t
PCS
X5001
V
t
RST
TRIP
02h
Min.
t
100
450
400
100
WDO
1
0001h or
0003h
t
VPH
t
TSU
t
RST
Typ.
200
600
200
1.4
t
THD
t
VPO
t
RP
Max.
300
800
300
2
Unit
May 30, 2006
sec
ms
ms
ms
ns
FN8125.1

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