wm8974gefl-v Wolfson Microelectronics plc, wm8974gefl-v Datasheet - Page 16
wm8974gefl-v
Manufacturer Part Number
wm8974gefl-v
Description
Mono Codec With Speaker Driver
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8974GEFL-V.pdf
(87 pages)
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WM8974
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INPUT PGA VOLUME CONTROL
Table 1 Input PGA Volume Control
AUXILLIARY INPUT
Figure 7 Auxiliary Input Circuit
The input microphone PGA has a gain range from -12dB to +35.25dB in 0.75dB steps. The gain
from the MICN input to the PGA output and from the AUX amplifier to the PGA output are always
common and controlled by the register bits INPPGAVOL[5:0]. These register bits also affect the
MICP pin when MICP2INPPGA=1.
When the Automatic Level Control (ALC) is enabled the input PGA gain is then controlled
automatically and the INPPGAVOL bits should not be used.
An auxilliary input circuit (Figure 7) is provided which consists of an amplifier which can be
configured either as an inverting buffer for a single input signal or as a mixer/summer for multiple
inputs with the use of external resistors. The circuit is enabled by the register bit AUXEN.
The AUXMODE register bit controls the auxiliary input mode of operation:
In buffer mode (AUXMODE=0) the switch labelled AUXSW in Figure 7 is open and the signal at the
AUX pin will be buffered and inverted through the aux circuit using only the internal components.
R45
Input PGA
volume control
R32
ALC control 1
REGISTER
ADDRESS
5:0
6
7
8
BIT
INPPGAVOL
INPPGAMUTE
INPPGAZC
ALCSEL
LABEL
010000
0
0
0
DEFAULT
Input PGA volume
000000 = -12dB
000001 = -11.25db
.
010000 = 0dB
.
111111 = 35.25dB
Mute control for input PGA:
0=Input PGA not muted, normal operation
1=Input PGA muted (and disconnected from the
following input BOOST stage).
Input PGA zero cross enable:
0=Update gain when gain register changes
1=Update gain on 1
register write.
ALC function select:
0=ALC off (PGA gain set by INPPGAVOL
register bits)
1=ALC on (ALC controls PGA gain)
PD, Rev 4.5, September 2008
DESCRIPTION
st
zero cross after gain
Production Data
16
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