gal16vp8 Lattice Semiconductor Corp., gal16vp8 Datasheet - Page 8

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gal16vp8

Manufacturer Part Number
gal16vp8
Description
Gal High-speed E2 Cmos Pld Generic Array Logic?
Manufacturer
Lattice Semiconductor Corp.
Datasheet
In the Simple mode, macrocells are configured as dedicated inputs
or as dedicated, always active, combinatorial outputs.
All outputs in the simple mode have a maximum of eight product
terms that can control the logic. In addition, each output has pro-
grammable polarity.
Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically.
Simple Mode
XOR
XOR
Vcc
Vcc
8
Pins 1 and 10 are always available as data inputs into the AND
array. The center two macrocells (pins 14 & 16) cannot be used
in the input configuration.
The JEDEC fuse numbers including the UES fuses and PTD fuses
are shown on the logic diagram.
Combinatorial Output with Feedback Configuration
for Simple Mode
Combinatorial Output Configuration for Simple Mode
Dedicated Input Configuration for Simple Mode
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- AC2=1 defines totem pole output.
- AC2=0 defines open-drain output.
- All OLMC except pins 14 & 16 can be configured to
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=0 defines this configuration.
- AC2=1 defines totem pole output.
- AC2=0 defines open-drain output.
- Pins 14 & 16 are permanently configured to this
- SYN=1.
- AC0=0.
- XOR=0 defines Active Low Output.
- XOR=1 defines Active High Output.
- AC1=1 defines this configuration.
- AC2=1 defines totem pole output.
- AC2=0 defines open-drain output.
- All OLMC except pins 14 & 16 can be configured to
this function.
function.
this function.
Specifications GAL16VP8

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