hys64t128020emv-2.5c2 Qimonda, hys64t128020emv-2.5c2 Datasheet - Page 11

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hys64t128020emv-2.5c2

Manufacturer Part Number
hys64t128020emv-2.5c2
Description
214-pin 1.5v Unbuffered Ddr2 Sdram Microdimm Modules Mdimm Sdram
Manufacturer
Qimonda
Datasheet
Rev. 1.00, 2008-06
01242008-CDK4-KSK6
Ball No.
166
63
15, 16, 41, 44,
58, 59, 65, 87,
88, 106, 145,
148, 150, 151,
167, 169, 170,
172, 212, 214
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Abbreviation
SSTL
CMOS
OD
Name
ODT0
ODT1
NC
NC
Pin
Type
I
I
NC
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_15 and SSTL_18)
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.
Buffer
Type
SSTL
SSTL
Function
On-Die Termination Control 1:0
Notes:
1. Asserts on-die termination for DQ, DM, DQS, and DQS\signals if
2. 2-rank module
Not Connected
Note: 1-rank module
Not connected
Note: Pins not connected on Qimonda MDIMMs
enabled via the DDR2 SDRAM mode register.
11
Unbuffered DDR2 SDRAM MicroDIMM Modules
HYS64T128020EMV–[2.5/3S](–)C2
Abbreviations for Buffer Type
Abbreviations for Pin Type
Internet Data Sheet
TABLE 6
TABLE 7

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