MSC8101UG/D FREESCALE [Freescale Semiconductor, Inc], MSC8101UG/D Datasheet - Page 51

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MSC8101UG/D

Manufacturer Part Number
MSC8101UG/D
Description
Network Digital Signal Processor
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
2.6.4.3 Host Reset Configuration
Host reset configuration allows the host to program the reset configuration word via the Host port after
deasserted, as described in the MSC8103 Reference Manual. The MSC8103 samples the signals described in Table
2-13 one the rising edge of
If HPE is sampled high, the host port is enabled. In this mode the
extends the internal
four 8-bit half-words to the Host Reset Configuration Register address to program the reset configuration word,
which is 32 bits wide. For more information, see the MSC8103 Reference Manual. The reset configuration word is
programmed before the internal PLL and DLL in the MSC8103 are locked. The host must program it after the
rising edge of the
MSC8103 clock. After the PLL and DLL are locked,
then released. The
Freescale Semiconductor
Note:
No.
4
5
6
Delay from SPLL lock to DLL lock
Delay from SPLL lock to HRESET deassertion
Delay from SPLL lock to SRESET deassertion
Value given for lowest possible CLKIN frequency 18 MHz to ensure proper initialization of reset sequence.
DLL enabled
— BCLK = 18 MHz
— BCLK = 75 MHz
DLL disabled
DLL enabled
— BCLK = 18 MHz
— BCLK = 75 MHz
DLL disabled
— BCLK = 18 MHz
— BCLK = 75 MHz
DLL enabled
— BCLK = 18 MHz
— BCLK = 75 MHz
DLL disabled
— BCLK = 18 MHz
— BCLK = 75 MHz
PORESET
SRESET
PORESET
PORESET
is released three bus clocks later (see Figure 2-7).
input. In this mode, the host must have its own clock that does not depend on the
Characteristics
until the host programs the reset configuration word register. The host must write
MSC8103 Network Digital Signal Processor, Rev. 11
Table 2-14.
when the signal is deasserted.
Reset Timing (Continued)
HRESET
remains asserted for another 512 bus clocks and is
RSTCONF
Expression
3073 / BLCK
3585 / BLCK
3588 / BLCK
512 / BLCK
515 / BLCK
pin must be pulled up. The device
Min
170.72
199.17
199.33
40.97
47.84
28.61
47.5
28.4
6.83
6.87
0.0
Max
PORESET
AC Timings
Unit
ns
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
2-11
is

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