CYIL1SM4000AA-GWCES Cypress Semiconductor Corp., CYIL1SM4000AA-GWCES Datasheet

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CYIL1SM4000AA-GWCES

Manufacturer Part Number
CYIL1SM4000AA-GWCES
Description
4 Megapixel CMOS Image Sensor
Manufacturer
Cypress Semiconductor Corp.
Datasheet
Features
Applications
Overview
This document describes the interfacing and driving of the LUPA
4000 image sensor. This 4 mega-pixel CMOS active pixel sensor
features synchronous shutter and a maximal frame rate of 15 fps
in full resolution. The readout speed can be boosted by
sub-sampling and windowed Region of Interest (ROI) readout.
Part Number and Ordering Information
Cypress Semiconductor Corporation
Document Number: 38-05712 Rev. *C
CYIL1SM4000AA-GDC
CYIL1SM4000AA-GWCES
CYIL1SC4000AA-GDC
CYIL1SM4000AA-GDCN
CYIL1SM4000-EVAL
2048 x 2048 active pixels
12 µm x 12 µm square pixels
Optical format: 24.6 mm x 24.6 mm
Monochrome or Color digital output
15 fps frame rate at full resolution
2 on-chip 10-bit ADCs
Random programmable windowing and sub-sampling modes
Full snapshot shutter
Binning (voltage averaging in X-direction)
Limited supplies: Nominal 2.5V (some supplies require 3.3V)
Serial to Parallel Interface (SPI)
0°C to 60°C operational temperature range
127-pin PGA package
Power dissipation: < 200 mW
Intelligent traffic system
High speed machine vision
Ordering Part Number
Monochrome with glass
Monochrome windowless (Contact your local
Cypress office)
Color with glass
Nitrogen filled, monochrome with glass
LUPA 4000 demonstration kit
198 Champion Court
Monochrome/Color
High dynamic range scenes can be captured using the double
and multiple slope functionality.
The sensor is used with one or two outputs. Two on-chip 10-bit
ADCs are used to convert the analog data to a 10-bit digital word
stream. The sensor uses a 3-wire SPI. It is housed in a 127-pin
ceramic PGA package.
This data sheet allows the user to develop a camera system
based on the described timing and interfacing.
The LUPA 4000 is available in color and monochrome without
the cover glass.
For engineering samples, contact imagesensors@cypress.com.
Figure 1. LUPA 4000 Photo
San Jose
LUPA 4000: 4 MegaPixel
CMOS Image Sensor
,
CA 95134-1709
CYIL1SM4000AA
127-Pin PGA
Package
Demo Kit
Revised July 16, 2009
408-943-2600
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CYIL1SM4000AA-GWCES Summary of contents

Page 1

... The readout speed can be boosted by sub-sampling and windowed Region of Interest (ROI) readout. Part Number and Ordering Information Ordering Part Number CYIL1SM4000AA-GDC CYIL1SM4000AA-GWCES CYIL1SC4000AA-GDC CYIL1SM4000AA-GDCN CYIL1SM4000-EVAL Cypress Semiconductor Corporation Document Number: 38-05712 Rev. *C ...

Page 2

... Dark Signal <140 mV/s at 21°C Noise Electrons < 40e S/N Ratio 2000 (single slope operation) MTF 64% Power Dissipation <200 mW (typical without ADCs) Document Number: 38-05712 Rev. *C Specification Value - - 2 /W.s Average white light - - CYIL1SM4000AA 2 ) Page [+] Feedback ...

Page 3

... 37.5% approximately between 500 nm and 700 nm. In view of a fill-factor of 60%, the QE is thus larger than 60% between 500 nm and 700 nm. Document Number: 38-05712 Rev. *C Figure 2. Spectral Response Curve for Mono QE 30% 600 700 Wavelength [nm] Figure 3. Spectral Response Curve for Color CYIL1SM4000AA QE 25% QE 20% QE 10% 800 900 1000 Page [+] Feedback ...

Page 4

... The resulting voltage-electron curve is independent of any parameters. The voltage to electrons conversion - gain is 13.5 µV/e . Note that the upper part of the curve (near saturation) is actually a logarithmic response. Document Number: 38-05712 Rev. *C Figure 4. Photo-Voltaic Response Curve 60000 80000 100000 # electrons CYIL1SM4000AA 120000 140000 Page [+] Feedback ...

Page 5

... The LUPA 4000 complies with JESD22-A114 HBM Class 0 and JESD22-C101 Class recommended that extreme care be taken while handling these devices to avoid damages due to ESD event. Document Number: 38-05712 Rev. *C Description = +2.5V. Boldface limits apply for MIN Min Supply Power Supply Tolerance CYIL1SM4000AA Min Max Units -0.5 2.9 V -0.5 2.9 V -0.5 2 ...

Page 6

... The starting point of the address is uploadable by means of the SPI Figure 5. Block Diagram of Image Sensor On chip drivers pixel array 2048 * 2048 Column amplifiers X shift register DA C SPI Figure 6. 6T Pixel Architecture Vmem Row-Select Sample CYIL1SM4000AA Reset, mem_hl, precharge, sample eos_x 2 differential outputs Table 1 Page [+] Feedback ...

Page 7

... DAC voltage by means of the SPI Figure 7. Output Stage Architecture. Image sensor 7bits DAC supply settings. The output voltage of Out2 is determined by the DAC. CYIL1SM4000AA Comment Full resolution. Subsample in X-direction. ROI read out. ROI read out. Out1: Pixel signal Out2: dc signal ...

Page 8

... ADC Timing The ADC converts the pixel data on the falling edge of the ADC_CLOCK but it takes 2 clock cycles before this pixel data is at the output of the ADC. This pipeline delay is shown in Figure 8. ADC Timing 200 ns CYIL1SM4000AA Specification [ Bits 10 Msamples/s Typ < 0.4 LSB RMS Typ < ...

Page 9

... The pixel core is read out line by line after integration. Note that the integration and read out cycle can occur in parallel or in sequential mode (see Readout of Image Sensor CYIL1SM4000AA Time axis Timing and on page 13). Page ...

Page 10

... Power supply column readout module. Should be tuneable to 3.3V max. 200 mA 2.5V Power supply digital modules 20 mA 2.5V Power supply output stages 200 mA 2.5V Analog supply of ADC circuitry 200 mA 2.5V Digital supply of ADC circuitry CYIL1SM4000AA time Table 8 and Table summarizes the supplies related to all other Description Page [+] Feedback ...

Page 11

... Table 10 summarizes the biasing signals required to drive this image sensor. To optimize biasing of column amplifiers to power dissipation, several biasing resistors are required. This optimisation results in an increase of signal swing and dynamic range. Comment CYIL1SM4000AA Related Module DC Level Output stage 0.7 V X-addressing 0.4 V Multiplex bus ...

Page 12

... Table 11 summarizes the relation between the internal and external pixel array signals. External Control Signal 0.45V Precharge (AL) 2.5V Sample (AL) Reset (AH) and Reset_ds (AH) Mem_hl (AL) CYIL1SM4000AA Table 11) Low DC Level High DC Level Vpre_l Controlled by bias-resistor Gnd Vdd Gnd Vres and Vres_ds Vmem_l ...

Page 13

... In the parallel mode the integration time of the frame I is ongoing during readout of frame I-1. structure Figure 13. Integration and Readout in Parallel Read frame Integration CYIL1SM4000AA [4] ): when the SPI register is uploaded, then the ): control signal of the column readout. Is used in [4] ): Control signal of the column readout. (see Sensor) ...

Page 14

... Figure 12. sample. Figure 15. Pixel Array Timing Table 12. Table 12. Timing specifications Symbol CYIL1SM4000AA shows this sequential timing. Read frame Name Value 5 - 8.2 μs Mem_HL μs Precharge μs Sample > 2 μs Precharge-Sample > 1 μs Integration time ...

Page 15

... If a Sync_y pulse is given before the end of the frame is reached, only a part of the frame Figure 17 is read. To obtain a correct initialisation, Sync_y must contain at least one rising edge of Clock_y when it is active. CYIL1SM4000AA L2048 C2048 Page [+] Feedback ...

Page 16

... Clock_x is low, the next pixel is selected. Consequently, during one complete period of Clock_x two pixels are read out by the output amplifier. If two analog outputs are used each Clock-X period one pixel is presented at each output. CYIL1SM4000AA Value >20 ns >0 ns >0 ns > ...

Page 17

... In this figure the pixel clock has a frequency of 50 MHz, which results in a pixel rate of 100 Msamples/sec. Figure 19 shows the relation between the applied Clock_x and the output signal. CYIL1SM4000AA Page [+] Feedback ...

Page 18

... Reduced ROT Timing The row overhead time is the time between the selection of lines that you must wait to get the data stable at the column amplifiers loss in time, which should be reduced as much as possible. CYIL1SM4000AA Output 1 Sync_x Clock_x: 25MHz ...

Page 19

... Sh_col drops and before the readout starts (see Figure is to have a short pulse of about precharge the output buses to a well known level. This mode makes the ghosting of bad columns impossible. In this mode, Nsf_load must be made much larger (at least 1 MΩ). CYIL1SM4000AA 17) Page [+] Feedback ...

Page 20

... Table 14. Readout Timing Specifications with Precharching of the Buses Symbol Document Number: 38-05712 Rev. *C Name Sync_Y Sync_Y-Clock_Y Clock_Y-Sync_Y NoRowSel Pre_col Sh_col 200 ns (or cst low, depending on timing mode) Voltage averaging Sync_X-Clock_X Prebus pulse CYIL1SM4000AA Value >20 ns >0 ns >0 ns >50 ns >50 ns >20 ns > short as possible Page [+] Feedback ...

Page 21

... Bit 25 is LSB When using sub sampling, only even X-addresses may be applied. Figure 23. SPI Block Diagram and Timing 32 outputs to sensor Bit 31 spi_in Clock_spi Entire uploadable block Load_addr Clock_spi spi_in B0 B1 Load_addr CYIL1SM4000AA Remarks Bit 0 B2 B31 command applied to sensor Page [+] Feedback ...

Page 22

... Vaa and decouple with C=100 nF to gnda. Input Analog reference input. Biasing for Y-addressing. Connect with R=2 MΩ to Vdd and decouple with C=100 nF to gndd. Supply Power supply digital modules. Ground Ground digital modules. Input Digital input. Control signal to reduce readout time. CYIL1SM4000AA Description Page [+] Feedback ...

Page 23

... Analog reference input. Biasing of first stage of ADC. Connect to V R=50 kΩand decouple with C=100 nF to GNDa. Input Analog reference input. High reference voltage of ADC. (see Figure 9 for exact resistor value) Supply Power supply reset drivers. Supply Power supply reset drivers. CYIL1SM4000AA Description Figure 9 for DDA with DDA Page [+] Feedback ...

Page 24

... Digital input. Control of double slope reset in the pixel. Input Digital input. Control of Vmem signal in pixel. Input Digital input. Control of Vprecharge signal in pixel. Input Digital input. Control of Vsample signal in pixel. Testpin Cathode of temperature diode. Testpin Anode of temperature diode. CYIL1SM4000AA Description with R=50 kΩ and DDA with DDA Page [+] Feedback ...

Page 25

... Digital input. Control signal to reduce readout time. Input Analog reference input. Biasing for Y-addressing. Supply Power supply pixel array. Supply Power supply column modules. Ground Ground analog modules. Supply Power supply analog modules. Ground Ground digital modules. or GND). DD CYIL1SM4000AA Description Table 10 for exact Page [+] Feedback ...

Page 26

... Package Drawing Figure 24. LUPA 4000: 127 Pin PGA Package Drawing Document Number: 38-05712 Rev. *C CYIL1SM4000AA 001-07580 *A Page [+] Feedback ...

Page 27

... Cavity pad: 27000 um X 29007 um ■ Pixel 0,0 is located at 478 um from the left hand side of the die and 1366 um from the bottom side of the die. Figure 25. Bonding Pads Diagram of the LUPA 4000 Package Document Number: 38-05712 Rev. *C CYIL1SM4000AA Figure 25. 001-48359 ** Page ...

Page 28

... They are free from defects in material and workmanship for one (1) year following the date of shipment defect is identified within the one (1) year period, Cypress will either replace the product or give credit for the product. CYIL1SM4000AA shows the transmission 800 900 Page ...

Page 29

... Figure 27. Contents of LUPA 4000 Evaluation Kit For more information on Image Sensors, contact imagesensors@cypress.com. Document Number: 38-05712 Rev. *C CYIL1SM4000AA Bench Tools software (under Win 2000 or XP) allows the grabbing and display of images and movies from the sensor. All acquired images and movies can be stored in different file formats ( bit) ...

Page 30

... Reset pulse Double slope reset pulse Total integration time Document Number: 38-05712 Rev. *C Figure 28. Dual Slope Diagram Read out Reset level 1 p1 Reset level Saturation level Double slope reset time (usually 5- 10% of the total integration time) CYIL1SM4000AA Page [+] Feedback ...

Page 31

... Document History Page Document Title: CYIL1SM4000AA LUPA 4000: 4 MegaPixel CMOS Image Sensor Document Number: 38-05712 Orig. of Submission Rev. ECN No. Change ** 310396 FPW See ECN *A 497132 QGS See ECN *B 649219 FPW See ECN *C 2738057 NVEA/PYRS 07/16/09 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress offers standard and customized CMOS image sensors for consumer as well as industrial and professional applications ...

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