LTC2488 LINER [Linear Technology], LTC2488 Datasheet - Page 24

• Manufacturer Part Number: LTC2488
• Description: 16-Bit 2-/4-Channel ?? ADC with Easy Drive Input Current Cancellation
• Manufacturer: LINER [Linear Technology]

APPLICATIONS INFORMATION
LTC2488
24
Figure 18. Input Normal Mode Rejection vs Input Frequency with
Input Perturbation of 100% (50Hz/60Hz Notch)
–100
–120
–100
–120
–20
–40
– 60
–80
– 60
–20
–40
–80
Figure 19. Measure Input Normal Mode Rejection vs Input
Frequency with Input Perturbation of 150% (60Hz Notch)
Figure 17. Input Normal Mode Rejection at f
0
0
0
0
12.5 25 37.5 50 62.5 75 87.5 100 112.5 125 137.5 150 162.5 175 187.5 200
12.5 25 37.5 50 62.5 75 87.5 100 112.5 125 137.5 150 162.5 175 187.5 200
–100
–110
–120
–10
–20
–30
–40
–50
–60
–70
–80
–90
250f
0
N
252f
INPUT SIGNAL FREQUENCY (Hz)
N
254f
INPUT FREQUENCY (Hz)
INPUT FREQUENCY (Hz)
N
256f
N
V
V
(150% OF FULL SCALE)
IN(P-P)
IN(P-P)
258f
MEASURED DATA
CALCULATED DATA
= 5V
= 7.5V
N
260f
N
2488 F17
S
262f
= 256 • f
N
V
V
V
T
V
V
V
V
T
A
CC
REF
IN(CM)
CC
REF
IN(CM)
IN(P-P)
A
= 25°C
= 25°C
= 5V
= 5V
= 5V
= 5V
N
= 2.5V
= 2.5V
= 5V
2488 F19
2488 F18
proprietary architecture used for the LTC2488 third order
modulator resolves this problem and guarantees stability
with input signals 150% of full-scale. In many industrial
applications, it is not uncommon to have microvolt level
signals superimposed over unwanted error sources with
several volts of peak-to-peak noise. Figure 19 shows mea-
surement results for the rejection of a 7.5V peak-to-peak
noise source (150% of full scale) applied to the LTC2488.
From this curve, it is shown that the rejection performance
is maintained even in extremely noisy environments.
Output Data Rate
When using its internal oscillator, the LTC2488 produces up
to 6.9 samples per second (sps) with a notch frequency of
55Hz. The actual output data rate depends upon the length
of the sleep and data output cycles which are controlled
by the user and can be made insignifi cantly short. When
operating with an external conversion clock (F
to an external oscillator), the LTC2488 output data rate
can be increased. The duration of the conversion cycle is
41036/f
as if the internal oscillator is used.
An increase in f
late into a proportional increase in the maximum output
data rate (up to a maximum of 100sps). The increase in
output rate leads to degradation in offset, full-scale error,
and effective resolution as well as a shift in frequency
rejection.
A change in f
internal notch position. This leads to reduced differential
mode rejection of line frequencies. The common mode
rejection of line frequencies remains unchanged, thus fully
differential input signals with a high degree of symmetry
on both the IN
frequency noise.
An increase in f
input and reference current. External RC networks will
continue to have zero differential input current, but the
time required for complete settling (580ns for f
307.2kHz) is reduced, proportionally.
Once the external oscillator frequency is increased above
1MHz (a more than 3x increase in output rate) the effective-
EOSC
. If f
EOSC
+
EOSC
EOSC
EOSC
and IN
results in a proportional change in the
over the nominal 307.2kHz will trans-
also increases the effective dynamic
= 307.2kHz, the converter behaves
–
pins will continue to reject line
O
connected
EOSC
2488f
=