LTC2488 LINER [Linear Technology], LTC2488 Datasheet - Page 8

• Manufacturer Part Number: LTC2488
• Description: 16-Bit 2-/4-Channel ?? ADC with Easy Drive Input Current Cancellation
• Manufacturer: LINER [Linear Technology]

PIN FUNCTIONS
⎯ C ⎯ S (Pin 4): Active LOW Chip Select. A LOW on this pin enables
FUNCTIONAL BLOCK DIAGRAM
LTC2488
F
the internal conversion clock rate. When F
ground, the converter uses its internal oscillator running at
307.2kHz. The conversion clock may also be overridden by
driving the F
the output rate and the digital fi lter rejection null.
SDI (Pin 2): Serial Data Input. This pin is used to select the
input channel. The serial data input is applied under control
of the serial clock (SCK) during the data output/input opera-
tion. The fi rst conversion following a new input is valid.
SCK (Pin 3): Bidirectional, Digital I/O, Clock Pin. In Internal
Serial Clock Operation mode, SCK is generated internally
and is seen as an output on the SCK pin. In External Serial
Clock Operation mode, the digital I/O clock is externally
applied to the SCK pin. The Serial Clock operation mode
is determined by the logic level applied to the SCK pin at
power up and during the most recent falling edge of ⎯ C ⎯ S .
the digital input/output and wakes up the ADC. Following each
conversion, the ADC automatically enters the Sleep mode
and remains in this low power state as long as ⎯ C ⎯ S is HIGH.
A LOW-to-HIGH transition on ⎯ C ⎯ S during the data output
aborts the data transfer and starts a new conversion.
SDO (Pin 5): Three-State Digital Output. During the data
output period, this pin is used as the serial data output.
When the chip select pin is HIGH, the SDO pin is in a high
impedance state. During the conversion and sleep periods,
this pin is used as the conversion status output. When
8
O
(Pin 1): Frequency Control Pin. Digital input that controls
O
pin with an external clock in order to change
GND
V
CC
REF
REF
COM
CH0
CH1
CH2
CH3
+
–
MUX
O
IN
IN
is connected to
+
–
Figure 1. Functional Block Diagram
∆Σ MODULATOR
–
DIFFERENTIAL
3RD ORDER
+
the conversion is in progress this pin is HIGH; once the
conversion is complete SDO goes low. The conversion
status is monitored by pulling ⎯ C ⎯ S LOW.
GND (Pin 6): Ground. Connect this pin to a common ground
plane through a low impedance connection.
COM (Pin 7): The common negative input (IN
single ended multiplexer confi gurations. The voltage on
CH0 to CH3 and COM pins can have any value between
GND – 0.3V to V
selected inputs (IN
(V
this input range, the converter produces unique over-range
and under-range output codes.
CH0 to CH3 (Pins 8-11): Analog Inputs. May be pro-
grammed for single-ended or differential mode.
V
a 10µF tantalum capacitor in parallel with a 0.1µF ceramic
capacitor as close to the part as possible.
REF
The voltage on these pins can have any value between
GND and V
remains more positive than the negative reference input,
REF
– REF
Exposed Pad (Pin 15): Ground. This pin is ground and
must be soldered to the PCB ground plane. For prototyping
purposes, this pin may remain fl oating.
CC
IN
AUTOCALIBRATION
–
DECIMATING FIR
(Pin 12): Positive Supply Voltage. Bypass to GND with
+
AND CONTROL
= IN
, by at least 0.1V. The differential voltage (V
(Pin 13), REF
–
ADDRESS
) sets the fullscale range for all input channels.
+
CC
– IN
as long as the reference positive input, REF
–
) from –0.5 • V
CC
+
–
OSCILLATOR
and IN
(Pin 14): Differential Reference Input.
INTERFACE
+ 0.3V. Within these limits, the two
INTERNAL
SERIAL
2488 BD
–
) provide a bipolar input range
REF
F
(INT/EXT)
SDI
SCK
SDO
CS
O
to 0.5 • V
REF
REF
. Outside
–
) for all
= REF
2488f
+
+
,