LTC2494CUHF-PBF LINER [Linear Technology], LTC2494CUHF-PBF Datasheet - Page 26

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LTC2494CUHF-PBF

Manufacturer Part Number
LTC2494CUHF-PBF
Description
16-Bit 8-/16-Channel ?? ADC with PGA and Easy Drive Input Current Cancellation
Manufacturer
LINER [Linear Technology]
Datasheet
APPLICATIONS INFORMATION
(INTERNAL)
LTC2494
During the conversion, the SCK and the serial data output
pin (SDO) are HIGH (EOC = 1). Once the conversion is
complete, SCK and SDO go LOW (EOC = 0) indicating
the conversion has fi nished and the device has entered
the sleep state. The device remains in the sleep state a
minimum amount of time (1/2 the internal SCK period)
then immediately begins outputting and inputting data.
The input data is shifted through the SDI pin on the ris-
ing edge of SCK (including the fi rst rising edge) and the
output data is shifted out the SDO pin on the falling edge
of SCK. The data input/output cycle is concluded and a
new conversion automatically begins after the 24th rising
edge of SCK. During the next conversion, SCK and SDO
remain HIGH until the conversion is complete.
The Use of a 10k Pull-Up on SCK for Internal SCK
Selection
If CS is pulled HIGH while the converter is driving SCK
LOW, the internal pull-up is not available to restore SCK
to a logic HIGH state if SCK is fl oating. This will cause the
26
SDO
SCK
SDI
CS
CONVERSION
DON'T CARE
BIT 23
EOC
1
1
BIT 22
“0”
0
2
BIT 21
10µF
SIG
Figure 11. Internal Serial Clock, Continuous Operation
EN
3
2.7V TO 5.5V
BIT 20 BIT 19 BIT 18 BIT 17 BIT 16 BIT 15 BIT 14 BIT 13
MSB
SGL
4
REFERENCE
0.1V TO V
0.1µF
ANALOG
INPUTS
VOLTAGE
ODD
5
CC
A2
28
29
30
15
16
23
8
7
6
V
REF
REF
CH0
CH7
CH8
CH15
COM
CC
LTC2494
A1
+
7
GND
SDO
SCK
DATA INPUT/OUTPUT
SDI
CS
A0
F
8
O
device to exit the internal SCK mode on the next falling
edge of CS. This can be avoided by adding an external 10k
pull-up resistor to the SCK pin.
Whenever SCK is LOW, the LTC2494’s internal pull-up at
SCK is disabled. Normally, SCK is not externally driven if
the device is operating in the internal SCK timing mode.
However, certain applications may require an external
driver on SCK. If the driver goes Hi-Z after outputting a
LOW signal, the internal pull-up is disabled. An external
10k pull-up resistor prevents the device from exiting the
internal SCK mode under this condition.
A similar situation may occur during the sleep state when
CS is pulsed HIGH-LOW-HIGH in order to test the conver-
sion status. If the device is in the sleep state (EOC = 0),
SCK will go LOW. If CS goes HIGH before the time t
the internal pull-up is activated. If SCK is heavily loaded,
the internal pull-up may not restore SCK to a HIGH state
before the next falling edge of CS. The external 10k pull-up
resistor prevents the device from exiting the internal SCK
mode under this condition.
1,3,4,5,6,31,32,33,39
34
38
35
37
36
EN2
9
3-WIRE
SPI INTERFACE
IM
10
= EXTERNAL OSCILLATOR
= INTERNAL OSCILLATOR
FA
11
BIT 12 BIT 11
FB
12
V
CC
OPTIONAL
10k
SPD
13
BIT 10
GS2
14
GS1
BIT 9
15
GS0
16
BIT 0
24
DON'T CARE
CONVERSION
EOCtest
2494fb
2494 F11
,

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