PC87307VUL National Semiconductor, PC87307VUL Datasheet - Page 19

• Manufacturer Part Number: PC87307VUL
• Description: PC87307/PC97307 Plug and Play Compatible and PC97 Compliant SuperI/O
• Manufacturer: National Semiconductor

IRTX
KBCLK
KBDAT
MCLK
MDAT
MR
MSEN1,0
MTR1,0
ONCTL
P17,16
P12
P21,20
PD7-0
PE
Signal/Pin
Name
81
102
103
104
105
51
83, 82
86, 85
67
108, 107
106
110, 109
129-122
115
Number
Pin
Parallel Port
Parallel Port
ISA-Bus
Module
UART2
(SIR)
KBC
KBC
KBC
KBC
FDC
FDC
APC
KBC
KBC
Signal/Pin Connection and Description
Group 19
Group 11
Group 11
Group 11
Group 11
Group 16
Group 23
Group 12
Group 12
Group 14
Group #
Group 1
Group 4
Group 2
I/O and
Output
Output
Output
Input
Input
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Infrared Transmit – Infrared serial output data.
Keyboard Clock – This I/O pin transfers the keyboard clock between
the SuperI/O chip and the external keyboard using the PS/2 protocol.
This pin is connected internally to the internal TO signal of the KBC.
Keyboard Data – This I/O pin transfers the keyboard data between
the SuperI/O chip and the external keyboard using the PS/2 protocol.
This pin is connected internally to KBC’s P10.
Mouse Clock – This I/O pin transfers the mouse clock between the
SuperI/O chip and the external keyboard using the PS/2 protocol.
This pin is connected internally to KBC’s T1.
Mouse Data – This I/O pin transfers the mouse data between the
SuperI/O chip and the external keyboard using the PS/2 protocol.
This pin is connected internally to KBC’s P11.
Master Reset – An active high MR input signal resets the controller
to the idle state, and resets all disk interface output signals to their
inactive states. MR also clears the DOR, DSR and CCR registers,
and resets the MODE command, CONFIGURE command, and LOCK
command parameters to their default values. MR does not affect the
SPECIFY command parameters. MR sets the configuration registers
to their selected default values.
Media Sense – These input pins are used for media sensing when
bit 6 of the SuperI/O FDC Configuration register (at index F0h) is 1.
See Section 2.6.1 on page 36. Each pin has a 40 K
resistor.
Motor Select 1,0 – These motor enable lines for drives 0 and 1 are
controlled by bits D7-4 of the Digital Output Register (DOR). They are
output signals that are active when they are low. They are encoded with
information to control four FDDs when bit 7 of the SuperI/O FDC
Configuration register is set, as described in Section 2.6.1 on page 36.
See DR1,0.
On/Off Control for the RTC’s Advanced Power Control (APC) –
This signal indicates to the main power supply that power should be
turned on. ONCTL is an open-drain output signal that is powered by
V
I/O Port – KBC quasi-bidirectional port for general purpose input and
output.
I/O Port – KBC open-drain signals for general purpose input and
output. These signals are controlled by KBC firmware.
Parallel Port Data – These bidirectional signals transfer data to and
from the peripheral data bus and the appropriate parallel port data
register. These signals have a high current drive capability. See
“GENERAL DC ELECTRICAL CHARACTERISTICS” on page 182.
Paper End – This input signal is set high by the printer when it is out
of paper. This pin has an internal nominal 25 K
resistor that is selected by bit 2 of the PP Confg0 register (second
level offset 05h) of the parallel port.
CCH
.
19
Function
pull-up or pull-down
internal pull-up
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