SAA7205 Philips Semiconductors, SAA7205 Datasheet - Page 27

• Manufacturer Part Number: SAA7205
• Description: MPEG-2 systems demultiplexer
• Manufacturer: Philips Semiconductors

Philips Semiconductors
The microcontroller must first force the audio interface to restart ( c_frc_restart = 1). Subsequently it may download
compressed audio data by writing consecutive bytes to the audio buffer (address 0x1xxx, see Table 13). A ‘beep’ must
always consist of valid packetized elementary stream (PES) data. If the ‘beep’ is to be output to the audio decoder in
PES format, ‘audio_pes’ must be set to logic 1. If the audio interface is programmed to software sync mode, the PES
headers do not have to contain PTS data words. However, if the ‘beep’ has to occur at a specific point in time, the
hardware sync mode ( c_sw_sync = 0 and c_free_run = 1) is most suitable and at least the first PES header has to
contain a valid PTS.
Table 6 SAA2500 and third party audio output interface
1997 Jan 21
handbook, full pagewidth
AUDAT
ADATCLK
AUDECLK
AUDATV
AUE
MPEG-2 systems demultiplexer
PIN
I/O
27 MHz
CCLKI
O
O
O
O
O
27
27
Fig.14 Audio descrambler clock circuit and programming examples.
f 1
normal, SAA2500 and
gated clock
both normal and SAA2500 continuous audio data acquisition clock, 32 to 448 kHz, or
gated clock
normal, SAA2500 and
gated clock
normal mode, gated clock
SAA2500 mode
normal mode, gated clock
SAA2500 mode
divide-by-M
I 0
I 1
11.29
12.288
0
1
f o
MODE
2.392 (= 3750/1568)
2.197 (= 3375/1536)
12
C o
M
12
12 (b 0 to 11)
audio elementary stream data, clocked out 111 ns after an
AUDATCLK rising edge in 32 to 448 kHz mode, and 74 ns
after an AUDATCLK rising edge in 9 MHz mode
9 MHz
gated audio data acquisition mode, 32 to 448 kHz.
AUDATCLK = 0 in case of invalid data (gated_clock = 1,
address 0x060A, see Table 13)
continuous audio decoder chip clock (N
valid audio data indicator (microcontroller SAA2500 = 0)
audio sync word indicator (microcontroller SAA2500 = 1)
audio data error flag (active LOW)
sampling frequency indicator; logic 1 for 44.1 kHz, logic 0 for
the other frequencies
27
DFF
1568
1536
I 0
12
1914 (= 1568
2257 (= 1536
f o = 256f s
= 11.29 or 12.288 MHz
= AUDECLK
FUNCTION
I 1
4096
4096
3750)
3375)
MGG776
Preliminary specification
27 MHz/M)
SAA7205H