S29WS-P SPANSION [SPANSION], S29WS-P Datasheet - Page 3

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S29WS-P

Manufacturer Part Number
S29WS-P
Description
512/256/128 Mb (32/16/8 M x 16 bit) 1.8 V Burst Simultaneous Read/Write MirrorBit Flash Memory
Manufacturer
SPANSION [SPANSION]
Datasheet
Features
General Description
Performance Characteristics
This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.
S29WS-P
MirrorBit
S29WS512P, S29WS256P, S29WS128P
512/256/128 Mb (32/16/8 M x 16 bit)
1.8 V Burst Simultaneous Read/Write MirrorBit Flash Memory
Data Sheet (Advance Information)
Max. Synch Access Time (t
Max. Synch. Burst Access, ns (t
Max. Asynch. Access Time, ns (t
Max OE# Access Time, ns (t
Single 1.8 V read/program/erase (1.70–1.95 V)
90 nm MirrorBit™ Technology
Simultaneous Read/Write operation with zero latency
Random page read access mode of 8 words with 20 ns intra
page access time
Full /Half drive output slew rate control
32 Word / 64 Byte Write Buffer
Sixteen-bank architecture consisting of
32/16/8 Mwords for 512/256/128P, respectively
Four 16 Kword sectors at both top and bottom of memory
array
510/254/126 64Kword sectors (WS512/256/128P)
Programmable linear (8/16/32) with or without wrap around
and continuous burst read modes
Secured Silicon Sector region consisting of 128 words each
for factory and 128 words for customer
20-year data retention (typical)
Cycling Endurance: 100,000 cycles per sector (typical)
Command set compatible with JEDEC (42.4) standard
Publication Number S29WS-P_00
Speed Option (MHz)
The Spansion S29WS512/256/128P are Mirrorbit
These burst mode Flash devices are capable of performing simultaneous read and write operations with zero
latency on two separate banks using separate data and address pins. These products can operate up to
108 MHz and use a single V
applications requiring higher density, better performance and lowered power consumption.
Flash Family
IACC
Read Access Times
OE
)
)
BACC
ACC
)
)
CC
of 1.7 V to 1.95 V that makes them ideal for today’s demanding wireless
Revision A
108
7.6
7.6
80
80
Continuous Burst Read @ 108 MHz
Simultaneous Operation 108 MHz
Program
Standby Mode
Single Word Programming
Effective Write Buffer Programming (V
Effective Write Buffer Programming (V
Sector Erase (16 Kword Sector)
Sector Erase (64 Kword Sector)
Amendment 7
TM
Hardware (WP#) protection of top and bottom sectors
Dual boot sector configuration (top and bottom)
Handshaking by monitoring RDY
Offered Packages
– WS512P/WS256P/WS128P: 84-ball FBGA
Low V
Persistent and Password methods of Advanced Sector
Protection
Write operation status bits indicate program and erase
operation completion
Suspend and Resume commands for Program and Erase
operations
Unlock Bypass program command to reduce programming
time
Synchronous or Asynchronous program operation,
independent of burst control register settings
ACC input pin to reduce factory programming time
Support for Common Flash Interface (CFI)
Flash products fabricated on 90 nm process technology.
(11.6 mm x 8 mm)
CC
write inhibit
Current Consumption (typical values)
Typical Program & Erase Times
Issue Date November 8, 2006
ACC
CC
) Per Word
) Per Word
350 ms
600 ms
36 mA
40 mA
20 mA
20 µA
9.4 µs
40 µs
6 µs

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