S29WS-P SPANSION [SPANSION], S29WS-P Datasheet - Page 30
S29WS-P
Manufacturer Part Number
S29WS-P
Description
512/256/128 Mb (32/16/8 M x 16 bit) 1.8 V Burst Simultaneous Read/Write MirrorBit Flash Memory
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S29WS-P.pdf
(89 pages)
- Current page: 30 of 89
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7.7
28
Program/Erase Operations
These devices are capable of several modes of programming and or erase operations which are described in
detail in the following sections. However, prior to any programming and or erase operation, devices must be
setup appropriately as outlined in the configuration register
During synchronous write operations, including writing command sequences, the system must drive AVD#
and CE# to V
OE# to V
pulse or rising edge of CLK or falling edge of WE#, whichever occurs first.
During asynchronous write operations, addresses are latched on the rising edge of AVD# or falling edge of
WE# while data is latched on the 1st rising edge of WE#, or CE# whichever comes first.
Note the following:
When the Embedded Program/Erase algorithm is complete, the device returns to the read mode.
The system can determine the status of the Program/Erase operation. Refer to
on page 41
While 1 can be programmed to 0, a 0 cannot be programmed to a 1. Any such attempt will be ignored as
only an erase operation can covert a 0 to a 1. For example:
Old Data = 0011
New Data = 0101
Result = 0001
Any commands written to the device during the Embedded Program/Erase Algorithm are ignored except
the Program/Erase Suspend commands.
Secured Silicon Sector, Autoselect, and CFI functions are unavailable when a Program/Erase operation is
in progress.
A hardware reset and/or power removal immediately terminates the Program/Erase operation and the
Program/Erase command sequence should be reinitiated once the device has returned to the read mode
to ensure data integrity.
Programming is allowed in any sequence and across sector boundaries only for single word programming
operation. See
IH
when writing commands or programming data. Addresses are latched on the rising edge of AVD#
IL
for further information.
, and OE# to V
Write Buffer Programming on page 30
D a t a
IH
when providing an address to the device, and drive WE# and CE# to V
S h e e t
S29WS-P
( A d v a n c e
when using the write buffer.
(Table 7.20 on page
I n f o r m a t i o n )
S29WS-P_00_A7 November 8, 2006
25).
Write Operation Status
IL
, and
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