M41T93_11 STMICROELECTRONICS [STMicroelectronics], M41T93_11 Datasheet - Page 29

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M41T93_11

Manufacturer Part Number
M41T93_11
Description
Serial SPI bus real-time clock with battery switchover
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
M41T93
3.6
Note:
Optional second programmable alarm
When the alarm 2 enable (AL2E) bit (D1 of address 13h) is set to a logic ‘1,’ registers 14h
through 18h provide control for a second programmable alarm which operates in the same
manner as the alarm function described above.
The AL2E bit defaults on initial power-up to a logic ‘0’ (alarm 2 disabled). In this mode, the
five address bytes (14h-18h) function as additional user SRAM, for a total of 12 bytes of
user SRAM.
Figure 15. Alarm interrupt reset waveform
Figure 16. Backup mode alarm waveform
ABE and A1IE bits = 1.
Table 6.
V CC
IRQ/FT/OUT
RPT5
V PFD
V SO
AF x Bits in Flags
Register
ALARM FLAG BITS (AF x )
IRQ/FT/OUT
1
1
1
1
1
0
RPT4
Alarm repeat modes
1
1
1
1
0
0
0Eh
RPT3
1
1
1
0
0
0
HIGH-Z
RPT2
Doc ID 12615 Rev 6
1
1
0
0
0
0
RPT1
1
0
0
0
0
0
0Fh
Once per second
Once per minute
Once per month
Alarm setting
Once per hour
Once per year
Once per day
Clock operation
HIGH-Z
trec
00h
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