AD9287BCPZRL-100 AD [Analog Devices], AD9287BCPZRL-100 Datasheet - Page 21

• Manufacturer Part Number: AD9287BCPZRL-100
• Description: Quad, 8-Bit, 100 MSPS Serial LVDS 1.8 V A/D Converter
• Manufacturer: AD [Analog Devices]

Clock Jitter Considerations
High speed, high resolution ADCs are sensitive to the quality of the
clock input. The degradation in SNR at a given input frequency
(f
In this equation, the rms aperture jitter represents the root mean
square of all jitter sources, including the clock input, analog input
signal, and ADC aperture jitter specifications. IF undersampling
applications are particularly sensitive to jitter (see Figure 47).
The clock input should be treated as an analog signal in cases
where aperture jitter may affect the dynamic range of the AD9287.
Power supplies for clock drivers should be separated from the
ADC output driver supplies to avoid modulating the clock signal
with digital noise. Low jitter, crystal-controlled oscillators make
the best clock sources. If the clock is generated from another
type of source (by gating, dividing, or other methods), it should
be retimed by the original clock at the last step.
Refer to the AN-501 Application Note and the AN-756
Application Note for more in-depth information about jitter
performance as it relates to ADCs (visit www.analog.com).
A
) due only to aperture jitter (t
SNR degradation = 20 × log 10 [1/2 × π × f
130
120
100
110
90
80
70
60
50
40
30
1
10 BITS
8 BITS
RMS CLOCK JITTER REQUIREMENT
Figure 47. Ideal SNR vs. Input Frequency and Jitter
ANALOG INPUT FREQUENCY (MHz)
10
0.125ps
0.25ps
J
0.5ps
1.0ps
2.0ps
) can be calculated by
100
A
× t
16 BITS
14 BITS
12 BITS
J
]
1000
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Power Dissipation and Power-Down Mode
As shown in Figure 48, the power dissipated by the AD9287 is
proportional to its sample rate. The digital power dissipation
does not vary much because it is determined primarily by the
DRVDD supply and bias current of the LVDS output drivers.
Figure 48. Supply Current vs. f
300
250
200
150
100
50
0
0
20
40
ENCODE (MSPS)
SAMPLE
60
for f
IN
DRVDD CURRENT
TOTAL POWER
AVDD CURRENT
= 10.3 MHz, f
80
100
SAMPLE
AD9287
= 100 MSPS
120
600
550
500
450
400
350
300