PCA9505 NXP [NXP Semiconductors], PCA9505 Datasheet - Page 7

• Manufacturer Part Number: PCA9505
• Description: 40-bit I2C-bus I/O port with RESET, OE and INT
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
7. Functional description
PCA9505_9506_3
Product data sheet
7.1 Device address
7.2 Command register
Table 2.
[1]
Refer to
IO0_0 to
Following a START condition, the bus master must send the address of the slave it is
accessing and the operation it wants to perform (read or write). The address of the
PCA9505/06 is shown in
addresses and need to be connected to V
pull-up resistors are incorporated on A2, A1, and A0.
The last bit of the first byte defines the operation to be performed. When set to logic 1 a
read is selected, while a logic 0 selects a write operation.
Following the successful acknowledgement of the slave address + R/W bit, the bus master
will send a byte to the PCA9505/06, which will be stored in the Command register.
Symbol
OE
INT
RESET
Fig 5. PCA9505/06 address
Fig 6. Command register
HVQFN package die supply ground is connected to both V
be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board
level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad
on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the
printed-circuit board in the thermal pad region.
Figure 1 “Block diagram of PCA9505/06”
IO4_7”.
Pin description
Pin
TSSOP56
30
55
56
AI
Auto-Increment
1
Rev. 03 — 6 June 2007
Figure
…continued
0
0
D5
0
5. Slave address pins A2, A1, and A0 choose 1 of 8 slave
HVQFN56
23
48
49
1
D4
fixed
0
register number
slave address
0
D3
0
40-bit I
DD
0
D2
0
(1) or V
programmable
A2
002aab495
D1
2
0
C-bus I/O port with RESET, OE and INT
A1
and
D0
Type
I
O
I
SS
0
SS
002aab494
pins and exposed center pad. V
A0 R/W
default at power-up
or after RESET
Figure 2 “Simplified schematic of
(0). To conserve power, no internal
Description
active LOW output enable input
active LOW interrupt output
active LOW reset input
PCA9505/06
© NXP B.V. 2007. All rights reserved.
SS
pins must
7 of 31