DSP56800ERM FREESCALE [Freescale Semiconductor, Inc], DSP56800ERM Datasheet - Page 121

• Manufacturer Part Number: DSP56800ERM
• Description: 16-bit Digital Signal Controllers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Module
OCCS Control Register
GPIO Pull-Up Enable Register
FM
PS
Freescale Semiconductor
Preliminary
Divide-By Register
Status Register
Shutdown Register
Oscillator Control Register
Clock Divider Register
Configuration Register
Security High Half Register
Security Low Half Register
Protection Register
User Status Register
Command Register
Address Register
Data Buffer Register
Optional Data 1 Register
Test Array Signature Register
Data Register
Data Direction Register
Peripheral Enable Register
Interrupt Assert Register
Interrupt Enable Register
Interrupt Edge Polarity Register
Interrupt Pending Register
Interrupt Edge Sensitive Register
Push-Pull Output Mode Control Register
Raw Data Register
Drive Strength Control Register
Control Register
Status Register
Register Name
Acronym
PPOUTM
SHUTDN
CLKDIV
TSTSIG
IASSRT
OCTRL
SECLO
PUPEN
PEREN
RDATA
USTAT
IEDGE
DIVBY
SECHI
IEPOL
IPEND
DRIVE
Peripheral Reference
CNFG
PROT
ADDR
DATA
OPT1
DATA
CTRL
STAT
CTRL
STAT
DDIR
CMD
New
IEN
56F8013 Technical Data, Rev. 2
Manual
LVICONTROL
SHUTDOWN
FMTST_SIG
LVISTATUS
RAWDATA
FMUSTAT
Acronym
PPMODE
FMSECH
FMPROT
FMADDR
FMCLKD
FMSECL
FMDATA
FMOPT1
FMCMD
Legacy
OSCTL
PLLCR
PLLDB
PLLSR
IPOLR
DRIVE
FMCR
IENR
IESR
PUR
DDR
PER
IAR
IPR
DR
OCCS
GPIOx_PPOUTM
GPIOx_IASSRT
GPIOx_PEREN
GPIOx_PUPEN
GPIOx_RDATA
OCCS_OCTRL
New Acronym Legacy Acronym
GPIOx_IPEND
GPIOx_IEDGE
GPIOx_DRIVE
GPIOx_IEPOL
OCCS_DIVBY
GPIOx_DATA
OCCS_CTRL
GPIOx_DDIR
OCCS_STAT
FM_CLKDIV
FM_TSTSIG
FM_SECLO
FM_USTAT
GPIOx_IEN
FM_SECHI
FM_CNFG
FM_PROT
FM_ADDR
FM_DATA
FM_OPT1
PS_CTRL
PS_STAT
FM_CMD
_SHUTDN
Data Sheet
GPIOx_PPMODE GPIO_x_PPMODE
GPIOx_RAWDATA GPIO_x_RAWDATA
GPIOx_IPOLR
GPIOx_DRIVE
LVICONTROL
SHUTDOWN
GPIOx_IENR
GPIOx_IESR
GPIOx_PUR
GPIOx_DDR
FMTST_SIG
GPIOx_PER
LVISTATUS
GPIOx_IAR
GPIOx_IPR
GPIOx_DR
FMUSTAT
FMADDR
FMCLKD
FMSECH
FMPROT
FMDATA
FMSECL
FMOPT1
FMCMD
PLLCR
OSCTL
PLLDB
PLLSR
FMCR
Electrical Design Considerations
x = A (n=0) B (n=1) C (n=2) D (n=3)
GPIO_x_DRIVE
GPIO_x_IPOLR
GPIO_x_IENR
GPIO_x_IESR
GPIO_x_DDR
GPIO_x_PUR
GPIO_x_PER
SHUTDOWN
GPIO_x_IAR
GPIO_x_IPR
GPIO_x_DR
Processor
FMUSTAT
Acronym
FMCLKD
FMSECH
FMPROT
LVICTRL
FMSECL
FMOPT1
FMCMD
PLLCR
OSCTL
Expert
PLLDB
PLLSR
FMCR
LVISR
Start
Address
Memory
0xF41B
0xF41D
0xF1nA
0xF1nB
0xF0F0
0xF0F1
0xF0F2
0xF0F4
0xF0F5
0xF400
0xF401
0xF403
0xF404
0xF410
0xF413
0xF414
0xF416
0xF418
0xF1n0
0xF1n1
0xF1n2
0xF1n3
0xF1n4
0xF1n5
0xF1n6
0xF1n7
0xF1n8
0xF1n9
0xF160
0xF161
121
End